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Matheus T. Moreira
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Publications
- 2023
- [c64]Willian Analdo Nunes, Marcos Luiggi Lemos Sartori, Matheus Trevisan Moreira, Fernando Gehm Moraes, Ney Laert Vilar Calazans:
Validating an Automated Asynchronous Synthesis Environment with a Challenging Design: RISC-V. SBCCI 2023: 1-6 - 2021
- [j12]Leonardo Rezende Juracy, Matheus Trevisan Moreira, Alexandre de Morais Amory, Alexandre F. Hampel, Fernando Gehm Moraes:
A High-Level Modeling Framework for Estimating Hardware Metrics of CNN Accelerators. IEEE Trans. Circuits Syst. I Regul. Pap. 68(11): 4783-4795 (2021) - [c60]Leonardo Rezende Juracy, Matheus T. Moreira, Alexandre M. Amory, Fernando Gehm Moraes:
A TensorFlow and System Simulator Integration Approach to Estimate Hardware Metrics of Convolution Accelerators. LASCAS 2021: 1-4 - 2020
- [i1]Leonardo Rezende Juracy, Matheus Trevisan Moreira, Alexandre de Morais Amory, Fernando Gehm Moraes:
A Survey of Aging Monitors and Reconfiguration Techniques. CoRR abs/2007.07829 (2020) - 2018
- [c54]Leonardo Rezende Juracy, Matheus T. Moreira, Felipe A. Kuentzer, Fernando Gehm Moraes, Alexandre M. Amory:
An LSSD Compliant Scan Cell for Flip-Flops. ISCAS 2018: 1-5 - 2017
- [c47]Felipe T. Bortolon, Fernando Gehm Moraes, Matheus T. Moreira, Sergio Bampi:
Estimation methods for static noise margins in CMOS subthreshold logic circuits. SBCCI 2017: 90-95 - 2015
- [j3]Matheus Trevisan Moreira, Michel Evandro Arendt, Fernando Gehm Moraes, Ney Laert Vilar Calazans:
Static Differential NCL Gates: Toward Low Power. IEEE Trans. Circuits Syst. II Express Briefs 62-II(6): 563-567 (2015) - [c32]Matheus Gibiluka, Matheus Trevisan Moreira, Fernando Gehm Moraes, Ney Laert Vilar Calazans:
BAT-Hermes: A transition-signaling bundled-data NoC router. LASCAS 2015: 1-4 - [c31]Guilherme Heck, Leandro S. Heck, Matheus T. Moreira, Fernando Gehm Moraes, Ney Laert Vilar Calazans:
A digitally controlled oscillator for fine-grained local clock generators in MPSoCs. LASCAS 2015: 1-4 - [c30]Ricardo A. Guazzelli, Fernando Gehm Moraes, Ney Laert Vilar Calazans, Matheus T. Moreira:
SDDS-NCL Design: Analysis of Supply Voltage Scaling. SBCCI 2015: 2:1-2:7 - 2014
- [j2]Matheus Trevisan Moreira, Guilherme Trojan, Fernando Gehm Moraes, Ney Laert Vilar Calazans:
Spatially Distributed Dual-Spacer Null Convention Logic Design. J. Low Power Electron. 10(3): 313-320 (2014) - [j1]Matheus Trevisan Moreira, Fernando Gehm Moraes, Ney Laert Vilar Calazans:
Beware the Dynamic C-Element. IEEE Trans. Very Large Scale Integr. Syst. 22(7): 1644-1647 (2014) - 2013
- [c19]Matheus T. Moreira, Bruno S. Oliveira, Fernando Gehm Moraes, Ney Laert Vilar Calazans:
Charge sharing aware NCL gates design. DFTS 2013: 212-217 - [c16]Alexandre M. Amory, Matheus T. Moreira, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Cristiano Lazzari, Marcelo Soares Lubaszewski:
Evaluating the scalability of test buses. ISSoC 2013: 1-6 - 2012
- [c10]Fernando Gehm Moraes, Matheus T. Moreira, Carlos Lucas, D. Correa, Douglas de O. Cardoso, M. Magnaguagno, Guilherme M. Castilhos, Ney Laert Vilar Calazans:
A generic FPGA emulation framework. ICECS 2012: 233-236 - [c7]Matheus T. Moreira, Bruno Cruz de Oliveira, Fernando Moraes, Ney Calazans:
Impact of C-elements in asynchronous circuits. ISQED 2012: 437-343 - 2011
- [c5]Matheus T. Moreira, Bruno Cruz de Oliveira, Julian J. H. Pontes, Fernando Moraes, Ney Calazans:
Adapting a C-element design flow for low power. ICECS 2011: 45-48 - 2010
- [c3]Julian J. H. Pontes, Matheus T. Moreira, Fernando Moraes, Ney Calazans:
Hermes-A - An Asynchronous NoC Router with Distributed Routing. PATMOS 2010: 150-159 - [c2]Julian J. H. Pontes, Matheus T. Moreira, Fernando Moraes, Ney Calazans:
Hermes-AA: A 65nm asynchronous NoC router with adaptive routing. SoCC 2010: 493-498
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