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Woong Choi
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Publications
- 2021
- [j16]Kyeongho Lee, Woong Choi, Jongsun Park:
A 65-nm 0.6-fJ/Bit/Search Ternary Content Addressable Memory Using an Adaptive Match-Line Discharge. IEEE J. Solid State Circuits 56(8): 2574-2584 (2021) - [c33]Kyeongho Lee, Sungsoo Cheon, Joongho Jo, Woong Choi, Jongsun Park:
A Charge-Sharing based 8T SRAM In-Memory Computing for Edge DNN Acceleration. DAC 2021: 739-744 - 2020
- [c32]Kyeongho Lee, Jinho Jeong, Sungsoo Cheon, Woong Choi, Jongsun Park:
Bit Parallel 6T SRAM In-memory Computing with Reconfigurable Bit-Precision. DAC 2020: 1-6 - [i1]Kyeongho Lee, Jinho Jeong, Sungsoo Cheon, Woong Choi, Jongsun Park:
Bit Parallel 6T SRAM In-memory Computing with Reconfigurable Bit-Precision. CoRR abs/2008.03378 (2020) - 2018
- [c31]Woong Choi, Kwanghyo Jeong, Kyungrak Choi, Kyeongho Lee, Jongsun Park:
Content addressable memory based binarized neural network accelerator using time-domain signal processing. DAC 2018: 138:1-138:6 - [c30]Woong Choi, Kyeongho Lee, Jongsun Park:
Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme. ISCAS 2018: 1-4
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last updated on 2024-09-21 23:41 CEST by the dblp team
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