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ORCIDSergio López-Buedo
- > Home > Persons > Sergio López-Buedo
Publications
- 2017
[c29]Carlos Vega
, Jose Fernando Zazo, Hugo Meyer, Ferad Zyulkyarov, Sergio López-Buedo, Javier Aracil:
Diluting the Scalability Boundaries: Exploring the Use of Disaggregated Architectures for High-Level Network Data Analysis. HPCC/SmartCity/DSS 2017: 340-347- [i1]Carlos Vega, Jose Fernando Zazo, Hugo Meyer, Ferad Zyulkyarov, Sergio López-Buedo, Javier Aracil:
Diluting the Scalability Boundaries: Exploring the Use of Disaggregated Architectures for High-Level Network Data Analysis. CoRR abs/1709.06127 (2017) - 2016
- [j12]Mario Ruiz, Javier Ramos, Gustavo Sutter, Jorge E. López de Vergara, Sergio López-Buedo, Javier Aracil:
Accurate and affordable packet-train testing systems for multi-gigabit-per-second networks. IEEE Commun. Mag. 54(3): 80-87 (2016) - [c22]Jose Fernando Zazo, Sergio López-Buedo, Gustavo Sutter, Javier Aracil:
Automated synthesis of FPGA-based packet filters for 100 Gbps network monitoring applications. ReConFig 2016: 1-6 - 2015
- [c21]Mario Ruiz, Gustavo Sutter, Sergio López-Buedo, Javier Ramos, Jorge E. López de Vergara, Javier Aracil:
Leveraging open source platforms and high-level synthesis for the design of FPGA-based 10 GbE active network probes. ReConFig 2015: 1-6 - 2014
- [j11]Marco Forconesi, Gustavo Sutter, Sergio López-Buedo, Jorge E. López de Vergara, Javier Aracil:
Bridging the gap between hardware and software open source network developments. IEEE Netw. 28(5): 13-19 (2014) - [c19]Jose Fernando Zazo, Marco Forconesi, Sergio López-Buedo, Gustavo Sutter, Javier Aracil:
TNT10G: A high-accuracy 10 GbE traffic player and recorder for multi-Terabyte traces. ReConFig 2014: 1-6 - 2013
- [j10]Diego Sanchez-Roman, Victor Moreno, Sergio López-Buedo, Gustavo Sutter, Iván González, Francisco J. Gomez-Arribas, Javier Aracil:
FPGA acceleration using high-level languages of a Monte-Carlo method for pricing complex options. J. Syst. Archit. 59(3): 135-143 (2013) - [c17]Marco Forconesi, Gustavo Sutter, Sergio López-Buedo, Javier Aracil:
Accurate and flexible flow-based monitoring for high-speed networks. FPL 2013: 1-4 - 2012
- [j8]Iván González, Sergio López-Buedo, Gustavo Sutter, Diego Sanchez-Roman, Francisco J. Gomez-Arribas, Javier Aracil:
Virtualization of reconfigurable coprocessors in HPRC systems with multicore architecture. J. Syst. Archit. 58(6-7): 247-256 (2012) - [c16]Jaime J. Garnica, Sergio López-Buedo, Víctor López, Javier Aracil, José María Gómez Hidalgo:
A FPGA-based scalable architecture for URL legal filtering in 100GbE networks. ReConFig 2012: 1-6 - 2011
- [j7]José Luis García-Dorado, José Alberto Hernández, Javier Aracil, Jorge E. López de Vergara, Sergio López-Buedo:
Characterization of the busy-hour traffic of IP networks based on their intrinsic features. Comput. Networks 55(9): 2111-2125 (2011) - [j6]Diego Sanchez-Roman, Gustavo Sutter, Sergio López-Buedo, Iván González, Francisco J. Gomez-Arribas, Javier Aracil, Francisco Palacios:
High-Level Languages and Floating-Point Arithmetic for FPGA-Based CFD Simulations. IEEE Des. Test Comput. 28(4): 28-37 (2011) - [c15]Victor Moreno, Jaime J. Garnica, Francisco J. Gomez-Arribas, Sergio López-Buedo, Iván González, Javier Aracil, Mikel Izal, Eduardo Magaña, Daniel Morató:
High-accuracy network monitoring using ETOMIC testbed. NGI 2011: 1-2 - 2007
- [c13]José Luis García-Dorado, Javier Aracil, José Alberto Hernández, Sergio López-Buedo, Jorge E. López de Vergara, Pedro Reviriego, Gabriel Huecas, Santiago Pavón, Juan Quemada:
A Quality of Service Assessment Technique for Large-Scale Management of Multimedia Flows. MMNS 2007: 173-176
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