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Thomas Schneider 0006

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Jochen Mades

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Publications

2001
[c5]
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  dblp key:
  - conf/mse/MadesSWHBG01
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  persistent URL:
  - https://dblp.org/rec/conf/mse/MadesSWHBG01
Jochen Mades, Thomas Schneider, André Windisch, Thomas Hollstein, Jürgen Becker, Manfred Glesner:
Concept of a Joint University/Industry Course for Mixed-Signal System-On-Chip Design. MSE 2001: 2-3
2000
[j1]
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  dblp key:
  - journals/it/WindischSMMGHE00
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  persistent URL:
  - https://dblp.org/rec/journals/it/WindischSMMGHE00
André Windisch, Thomas Schneider, Jochen Mades, Dieter Monjau, Manfred Glesner, Carsten Hammer, Wolfgang Ecker:
Eine flexible Simulationsumgebung für System-On-Chip Design (A Flexible Simulation Environment for System-On-Chip Design). Informationstechnik Tech. Inform. 42(5): 43- (2000)
[c4]
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  dblp key:
  - conf/bmas/SchneiderMGWE00
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  - https://dblp.org/rec/conf/bmas/SchneiderMGWE00
Thomas Schneider, Jochen Mades, Manfred Glesner, André Windisch, Wolfgang Ecker:
An Open VHDL-AMS Simulation Framework. BMAS 2000: 89-94
[c3]
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  dblp key:
  - conf/mbmv/EckerHMSWY00
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  - https://dblp.org/rec/conf/mbmv/EckerHMSWY00
Wolfgang Ecker, Mike Heuchling, Jochen Mades, Thomas Schneider, André Windisch, Ke Yang:
VXML: VHDL Hardware Design Representation in XML. MBMV 2000: 129-140
[c2]
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  dblp key:
  - conf/sbcci/Mades0GWE00
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  - https://dblp.org/rec/conf/sbcci/Mades0GWE00
Jochen Mades, Thomas Schneider, Manfred Glesner, André Windisch, Wolfgang Ecker:
A JAVA-Based Mixed-Signal Design Environment. SBCCI 2000: 301-306
1999
[c1]
- no documents available
  - no references & citations available
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  dblp key:
  - conf/parco/Windisch0YME99
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  persistent URL:
  - https://dblp.org/rec/conf/parco/Windisch0YME99
André Windisch, Thomas Schneider, Ke Yang, Jochen Mades, Wolfgang Ecker:
A scalable multithreaded compiler front-end. PARCO 1999: 722-729

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