Chirn Chye Boon

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Zhe Liu 0038

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Publications

2023
[c28]
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Zhe Liu, Chirn Chye Boon, Yangtao Dong, Kaituo Yang:
A 2.4dB NF +4.1dBm IIP3 Differential Dual-Feedforward-Based Noise-Cancelling LNTA With Complementary NMOS and PMOS Configuration. ESSCIRC 2023: 377-380
2022
[j36]
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Zhe Liu, Chirn Chye Boon:
A 0.092-mm² 2-12-GHz Noise-Cancelling Low-Noise Amplifier With Gain Improvement and Noise Reduction. IEEE Trans. Circuits Syst. II Express Briefs 69(10): 4013-4017 (2022)
[c26]
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  - conf/cicc/DongBYL22
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Yangtao Dong, Chirn Chye Boon, Kaituo Yang, Zhe Liu:
A 2-GHz Dual-Path Sub-Sampling PLL with Ring VCO Phase Noise Suppression. CICC 2022: 1-2
[c25]
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  - conf/isscc/LiuBLYDG22
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Zhe Liu, Chirn Chye Boon, Chenyang Li, Kaituo Yang, Yangtao Dong, Ting Guo:
A 0.0078mm2 3.4mW Wideband Positive-feedback-Based Noise-Cancelling LNA in 28nm CMOS Exploiting G_m Boosting. ISSCC 2022: 1-3
[c24]
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  - conf/isscc/YangBLPGDLZYWL22
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Kaituo Yang, Chirn Chye Boon, Zhe Liu, Jiaming Piao, Ting Guo, Yangtao Dong, Chenyang Li, Ao Zhou, Zhijie Yang, Xiaoying Wang, Yufeng Liu:
A Hybrid Coupler-First 5GHz Noise-Cancelling Dual-Mode Receiver with +10dBm in-Band IIP3 in Current-Mode and 1.7dB NF in Voltage-Mode. ISSCC 2022: 438-440
2021
[j30]
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  - journals/tvlsi/DongBDLL21
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Yangtao Dong, Chirn Chye Boon, Xin Ding, Chenyang Li, Zhe Liu:
A Bidirectional Nonlinearly Coupled QVCO With Passive Phase Interpolation for Multiphase Signals Generation. IEEE Trans. Very Large Scale Integr. Syst. 29(7): 1480-1484 (2021)
[c21]
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  - conf/isscc/YangBFLLGYDZW21
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Kaituo Yang, Chirn Chye Boon, Guangyin Feng, Chenyang Li, Zhe Liu, Ting Guo, Xiang Yi, Yangtao Dong, Ao Zhou, Xiaoying Wang:
A 1.75dB-NF 25mW 5GHz Transformer-Based Noise- Cancelling CMOS Receiver Front-End. ISSCC 2021: 102-104
2020
[j27]
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Lingshan Kong, Hang Liu, Xi Zhu, Chirn Chye Boon, Chenyang Li, Zhe Liu, Kiat Seng Yeo:
Design of a Wideband Variable-Gain Amplifier With Self-Compensated Transistor for Accurate dB-Linear Characteristic in 65 nm CMOS Technology. IEEE Trans. Circuits Syst. 67-I(12): 4187-4198 (2020)
[c18]
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  - conf/iscas/ChenBZLLLG20
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Qian Chen, Chirn Chye Boon, Xueyong Zhang, Chenyang Li, Yuan Liang, Zhe Liu, Ting Guo:
Multi-Channel FSK Inter/Intra-Chip Communication by Exploiting Field-Confined Slow-Wave Transmission Line. ISCAS 2020: 1-5

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