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James C. Hoe
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Publications
- 2023
- [j24]Zhipeng Zhao, Joseph Melber, Siddharth Sahay, Shashank Obla, Eriko Nurvitadhi, James C. Hoe:
Exploiting the Common Case When Accelerating Input-Dependent Stream Processing by FPGA. IEEE Trans. Computers 72(5): 1343-1355 (2023) - 2020
- [c80]Andrew Boutros, Eriko Nurvitadhi, Rui Ma, Sergey Gribok, Zhipeng Zhao, James C. Hoe, Vaughn Betz, Martin Langhammer:
Beyond Peak Performance: Comparing the Real Performance of AI-Optimized FPGAs and GPUs. FPT 2020: 10-19 - 2019
- [c78]Yu Wang, James C. Hoe, Eriko Nurvitadhi:
Processor Assisted Worklist Scheduling for FPGA Accelerated Graph Processing on a Shared-Memory Platform. FCCM 2019: 136-144 - 2016
- [c72]Gabriel Weisz, Joseph Melber, Yu Wang, Kermin Fleming, Eriko Nurvitadhi, James C. Hoe:
A Study of Pointer-Chasing Performance on Shared-Memory Processor-FPGA Systems. FPGA 2016: 264-273 - [p1]Hyun Soo Park, Yu Wang, Eriko Nurvitadhi, James C. Hoe, Yaser Sheikh, Mei Chen:
3D Point Cloud Reduction Using Mixed-Integer Quadratic Programming. Large-Scale Visual Geo-Localization 2016: 189-203 - 2014
- [c65]Eriko Nurvitadhi, Gabriel Weisz, Yu Wang, Skand Hurkat, Marie Nguyen, James C. Hoe, José F. Martínez, Carlos Guestrin:
GraphGen: An FPGA Framework for Vertex-Centric Graph Computation. FCCM 2014: 25-28 - 2013
- [c59]Hyun Soo Park, Yu Wang, Eriko Nurvitadhi, James C. Hoe, Yaser Sheikh, Mei Chen:
3D Point Cloud Reduction Using Mixed-Integer Quadratic Programming. CVPR Workshops 2013: 229-236 - 2011
- [j15]Eriko Nurvitadhi, James C. Hoe, Timothy Kam, Shih-Lien Lu:
Automatic Pipelining From Transactional Datapath Specifications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(3): 441-454 (2011) - [c48]Eriko Nurvitadhi, James C. Hoe, Timothy Kam, Shih-Lien Lu:
Integrating formal verification and high-level processor pipeline synthesis. SASP 2011: 22-29 - 2010
- [c47]Eriko Nurvitadhi, James C. Hoe, Shih-Lien Lu, Timothy Kam:
Automatic multithreaded pipeline synthesis from transactional datapath specifications. DAC 2010: 314-319 - [c46]Eriko Nurvitadhi, James C. Hoe, Timothy Kam, Shih-Lien Lu:
Automatic pipelining from transactional datapath specifications. DATE 2010: 1001-1004 - 2009
- [j10]Eric S. Chung, Michael Papamichael, Eriko Nurvitadhi, James C. Hoe, Ken Mai, Babak Falsafi:
ProtoFlex: Towards Scalable, Full-System Multiprocessor Simulations Using FPGAs. ACM Trans. Reconfigurable Technol. Syst. 2(2): 15:1-15:32 (2009) - 2008
- [c35]Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, Ken Mai:
A complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs. FPGA 2008: 77-86 - 2007
- [c30]Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, Ken Mai:
PROToFLEX: FPGA-accelerated Hybrid Functional Simulator. IPDPS 2007: 1-6 - 2005
- [j4]Brian T. Gold, Jangwoo Kim, Jared C. Smolens, Eric S. Chung, Vasileios Liaskovitis, Eriko Nurvitadhi, Babak Falsafi, James C. Hoe, Andreas Nowatzyk:
TRUSS: A Reliable, Scalable Server Architecture. IEEE Micro 25(6): 51-59 (2005)
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