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Kailasnath Maneparambil

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2000 – 2009

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2007
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  - conf/mtv/SunkariCVM07
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  - https://dblp.org/rec/conf/mtv/SunkariCVM07
Sasidhar Sunkari, Supratik Chakraborty, Vivekananda M. Vedula, Kailasnath Maneparambil:
A Scalable Symbolic Simulator for Verilog RTL. MTV 2007: 51-59
2005
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  - conf/ats/BhaskarPKM05
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K. Uday Bhaskar, M. Prasanth, V. Kamakoti, Kailasnath Maneparambil:
A Framework for Automatic Assembly Program Generator (A²PG) for Verification and Testing of Processor Cores. Asian Test Symposium 2005: 40-45

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