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Yoonsoo Kim
This is just a disambiguation page, and is not intended to be the bibliography of an actual person. The links to all actual bibliographies of persons of the same or a similar name can be found below. Any publication listed on this page has not been assigned to an actual author yet. If you know the true author of one of the publications listed below, you are welcome to contact us.
Person information
Other persons with the same name
- Yoonsoo Kim 0001
— Gyeongsang National University, School of Aerospace Engineering, Graduate School of Mechanical and Aerospace Engineering, Jinju, Korea (and 3 more)
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2020 – today
- 2025
[i1]Julien Loiseau, Hyun Lim, Andrés Yagüe López, Mammadbaghir Baghirzade, Shihab Shahriar Khan, Yoonsoo Kim, Sudarshan Neopane, Alexander Strack, Farhana Taiyebah, Benjamin K. Bergen:
HARD: A Performance Portable Radiation Hydrodynamics Code based on FleCSI Framework. CoRR abs/2509.08971 (2025)- 2022
[j10]Hyungjoo Ahn
, Junwoo Park
, Hyochoong Bang, Yoonsoo Kim:
Model Predictive Control-Based Multirotor Three-Dimensional Motion Planning with Point Cloud Obstacle. J. Aerosp. Inf. Syst. 19(3): 179-193 (2022)- 2020
[j9]Won Jeon
, Jun Hyun Park
, Yoonsoo Kim, Gunjae Koo
, Won Woo Ro
:
Hi-End: Hierarchical, Endurance-Aware STT-MRAM-Based Register File for Energy-Efficient GPUs. IEEE Access 8: 127768-127780 (2020)
2010 – 2019
- 2017
[c13]Chang-Hoi Hur, Seong-Pyo Kim, Yoon-Soo Kim, Jung-Ho Eom:
Changes of Cyber-Attacks Techniques and Patterns after the Fourth Industrial Revolution. FiCloud Workshops 2017: 69-74- 2016
[j8]Gyu-Seob Jeong, Sang-Hyeok Chu, Yoonsoo Kim, Sungchun Jang, Sungwoo Kim, Woo-Rham Bae
, Sung-Yong Cho, Haram Ju, Deog-Kyoon Jeong:
A 20 Gb/s 0.4 pJ/b Energy-Efficient Transmitter Driver Utilizing Constant- Gm Bias. IEEE J. Solid State Circuits 51(10): 2312-2327 (2016)
[j7]Woo-Rham Bae
, Gyu-Seob Jeong, Kwanseo Park
, Sung-Yong Cho, Yoonsoo Kim, Deog-Kyoon Jeong:
A 0.36 pJ/bit, 0.025 mm2, 12.5 Gb/s Forwarded-Clock Receiver With a Stuck-Free Delay-Locked Loop and a Half-Bit Delay Line in 65-nm CMOS Technology. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(9): 1393-1403 (2016)
[j6]Yoonsoo Kim, Gyu-Seob Jeong, Jun-Eun Park
, Joonbae Park, Gyungock Kim, Deog-Kyoon Jeong:
20-Gb/s 5-VPP and 25-Gb/s 3.8-VPP Area-Efficient Modulator Drivers in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 63-II(11): 1034-1038 (2016)
[j5]Woo-Rham Bae
, Gyu-Seob Jeong, Yoonsoo Kim, Hankyu Chi, Deog-Kyoon Jeong:
Design of Silicon Photonic Interconnect ICs in 65-nm CMOS Technology. IEEE Trans. Very Large Scale Integr. Syst. 24(6): 2234-2243 (2016)- 2015
[j4]Sungchun Jang, Sungwoo Kim, Sang-Hyeok Chu, Gyu-Seob Jeong, Yoonsoo Kim, Deog-Kyoon Jeong:
An Optimum Loop Gain Tracking All-Digital PLL Using Autocorrelation of Bang-Bang Phase-Frequency Detection. IEEE Trans. Circuits Syst. II Express Briefs 62-II(9): 836-840 (2015)
[c12]Gyu-Seob Jeong, Sang-Hyeok Chu, Yoonsoo Kim, Sungchun Jang, Sungwoo Kim, Woo-Rham Bae
, Sung-Yong Cho, Haram Ju, Deog-Kyoon Jeong:
A 20 Gb/s 0.4 pJ/b energy-efficient transmitter driver architecture utilizing constant Gm. A-SSCC 2015: 1-4
[c11]Sung-Yong Cho, Sungwoo Kim, Min-Seong Choo
, Jinhyung Lee, Han-Gon Ko, Sungchun Jang, Sang-Hyeok Chu, Woo-Rham Bae
, Yoonsoo Kim, Deog-Kyoon Jeong:
A 5-GHz subharmonically injection-locked all-digital PLL with complementary switched injection. ESSCIRC 2015: 384-387
[c10]Kwanseo Park
, Woo-Rham Bae
, Haram Ju, Jinhyung Lee, Gyu-Seob Jeong, Yoonsoo Kim, Deog-Kyoon Jeong:
A 10 Gb/s hybrid PLL-based forwarded clock receiver in 65-nm CMOS. ISCAS 2015: 2389-2392
[c9]Sungwoo Kim, Sungchun Jang, Jun-Eun Park
, Yoonsoo Kim, Gyungock Kim, Deog-Kyoon Jeong:
A compact 22-Gb/s transmitter for optical links with all-digital phase-locked loop. ISCAS 2015: 2856-2859
[c8]Jun-Eun Park
, Yoonsoo Kim, Sungwoo Kim, Gyungock Kim, Deog-Kyoon Jeong:
20-Gb/s 3.6-VPP-swing source-series-terminated driver with 2-Tap FFE in 65-nm CMOS. ISCAS 2015: 2864-2867
[c7]Sungchun Jang, Sungwoo Kim, Sang-Hyeok Chu, Gyu-Seob Jeong, Yoonsoo Kim, Deog-Kyoon Jeong:
An all-digital bang-bang PLL using two-point modulation and background gain calibration for spread spectrum clock generation. VLSIC 2015: 136-- 2014
[c6]Woo-Rham Bae
, Gyu-Seob Jeong, Kwanseo Park
, Sung-Yong Cho, Yoonsoo Kim, Deog-Kyoon Jeong:
A 0.36 pJ/bit, 12.5 Gb/s forwarded-clock receiver with a sample swapping scheme and a half-bit delay line. ESSCIRC 2014: 447-450
[c5]Yoonsoo Kim, Woo-Rham Bae
, Deog-Kyoon Jeong:
A 10-Gb/s 6-Vpp differential modulator driver in 65-nm CMOS. ISCAS 2014: 1869-1872- 2013
[c4]Yoonsoo Kim:
Collision-free vehicle formation control under arbitrarily switching network topology. ECC 2013: 2819-2823- 2012
[c3]Daehee Won, Yoonsoo Kim, Hangki Joh, Intae Ryoo, Doungyung Suh:
Consumer Propensity and Location Analysis based Real-time Location Tracing Advertisement Service Design and Implementation - Real-time Location based Advertisement System. SIGMAP 2012: 171-179- 2011
[j3]Yoonsoo Kim:
Control Systems Lab Using a LEGO Mindstorms NXT Motor System. IEEE Trans. Educ. 54(3): 452-461 (2011)- 2010
[j2]Yoonsoo Kim:
Bisection Algorithm of Increasing Algebraic Connectivity by Adding an Edge. IEEE Trans. Autom. Control. 55(1): 170-174 (2010)
2000 – 2009
- 2001
[c2]Kwang-deok Seo, Jae-kyoon Kim, Kook-Yeol Yoo, Yoon-Soo Kim:
Efficient requantization method for INTRA MB in heterogeneous transcoding. VCIP 2001: 968-974
1990 – 1999
- 1997
[c1]Jae H. Kim
, Eul-Hwan Lee, Yoon-Soo Kim:
Model-based error-diffusion method for tone linearity correction in binary printers. Color Imaging: Device-Independent Color, Color Hard Copy, and Graphic Arts 1997: 266-271- 1995
[j1]Jae H. Kim, Tae I. Chung, Hyung S. Kim, Kyung S. Son, Yoon-Soo Kim:
New edge-enhanced error diffusion algorithm based on the error sum criterion. J. Electronic Imaging 4(2): 172-178 (1995)
Coauthor Index

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last updated on 2025-11-17 00:02 CET by the dblp team
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