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ORCIDJie Zhou 0007
Person information
- affiliation: National University of Defense Technology, College of Computer, Changsha, China
Other persons with the same name
- Jie Zhou — disambiguation page
- Jie Zhou 0001
![[0000-0001-7701-234X]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png "0000-0001-7701-234X")
— Tsinghua University, Department of Automation, Tsinghua National Laboratory for Information Science and Technology, Beijing, China (and 1 more) - Jie Zhou 0002 — Sichuan University, College of Mathematics, Chengdu, China
- Jie Zhou 0003 — Chinese Academy of Sciences, Institute of Remote Sensing and Digital Earth, Beijing, China (and 1 more)
- Jie Zhou 0004 — Shihezi University, College of Information Science and Technology, China
- Jie Zhou 0005 — Donghua University, School of Sciences, Shanghai, China
- Jie Zhou 0006 — Nanjing University of Information Science and Technology, College of Electronic and Information Engineering, China (and 2 more)
- Jie Zhou 0008 — South China University of Technology, School of Computer Science and Engineering, Guangzhou, China (and 2 more)
- Jie Zhou 0009 — Shenzhen University, College of Computer Science and Software Engineering, China (and 1 more)
- Jie Zhou 0010 — University of Science and Technology of China, Hefei, CAS Key Laboratory of Technology in Geo-spatial Information Processing and Application System, China
- Jie Zhou 0011 — North University of China, School of Mechanical Engineering, Taiyuan, Shanxi, China
- Jie Zhou 0012 — Army Engineering University, Department of Mechanical Engineering, Shijiazhuang, China
- Jie Zhou 0013 — Shanghai Jiaotong University, School of Electric Information and Electronic Engineering, China
- Jie Zhou 0014 — Zhejiang University, Department of Precision Medicine and Biopharmaceutics, Hangzhou, China
- Jie Zhou 0015 — East China Normal University, Shanghai Key Laboratory of Multidimensional Information Processing, Shanghai, China (and 2 more)
- Jie Zhou 0016 — Tencent Inc., WeChat AI, Pattern Recognition Center, Beijing, China
- Jie Zhou 0017 — East China Normal University, School of Computer Science and Technology, Shanghai, China
- Jie Zhou 0018 — Shanghai University of Electric Power, School of Automation Engineering, Shanghai, China
- Jie Zhou 0019 — Jiangsu University, School of Automotive and Traffic Engineering, Zhenjiang, China
- Jie Zhou 0020 — Sun Yat-sen University, Key Laboratory of Sensing Technology and Biomedical Instrument of Guangdong Province, Guangzhou, China
- Jie Zhou 0021 — Beijing University of Posts and Telecommunications, School of Electronic Engineering, Beijing, China (and 1 more)
- Jie Zhou 0022 — University of Rochester, Department of Computer Science, Rochester, NY, USA
- Jie Zhou 0023 — Northern Illinois University, Department of Computer Science, DeKalb, IL, USA (and 1 more)
- Jie Zhou 0024 — Tsinghua University, Department of Computer Science and Technology, Beijing, China
- Jie Zhou 0025 — Baidu Research, Institute of Deep Learning, Beijing, China
- Jie Zhou 0026 — University of Electronic Science and Technology of China, Center for Advanced Semiconductor and Integrated Micro-System, Chengdu, China
- Jie Zhou 0027 — Harbin Institute of Technology, Department of Electronic Engineering, China
- Jie Zhou 0028 — China Academy of Engineering Physics, CAEP, Institute of Electronic Engineering, China
- Jie Zhou 0029 — City University of Hong Kong, Department of Computer Science, Hong Kong (and 1 more)
- Jie Zhou 0030 — Shanghai University, School of Computer Engineering and Science, China
- Jie Zhou 0031 — National University of Defense Technology, NUDT, School of Electronic Science and Technology, Changsha, China
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2010 – 2019
- 2016
[c19]Qi Lv, Xin Niu, Yong Dou, Yueqing Wang, Jiaqing Xu, Jie Zhou:
Hyperspectral image classification via kernel extreme learning machine using local receptive fields. ICIP 2016: 256-260- 2014
- [j10]Lei Guo, Yuhua Tang, Yuanwu Lei, Yong Dou, Jie Zhou:
Transpose-free variable-size FFT accelerator based on-chip SRAM. IEICE Electron. Express 11(15): 20140171 (2014) - [j9]Shi-Ce Ni, Yong Dou, Kai Chen, Jie Zhou:
Design and Implement of High Performance Crypto Coprocessor. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 97-A(4): 989-990 (2014) - [j8]Rongchun Li, Yong Dou, Jie Zhou, Chen Chen:
Efficient Parallel Interference Cancellation MIMO Detector for Software Defined Radio on GPUs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 97-A(6): 1388-1395 (2014) - [j7]Rongchun Li, Yong Dou, Jie Zhou, Lin Deng, Shi Wang:
CuSora: Real-time software radio using multi-core graphics processing unit. J. Syst. Archit. 60(3): 280-292 (2014) - 2013
- [j6]Lei Guo, Yuhua Tang, Yong Dou, Yuanwu Lei, Meng Ma, Jie Zhou:
Window Memory Layout Scheme for Alternate Row-Wise/Column-Wise Matrix Access. IEICE Trans. Inf. Syst. 96-D(12): 2765-2775 (2013) - [j5]Rongchun Li, Yong Dou, Jie Zhou, Baofeng Li, Jinbo Xu:
From WiFi to WiMAX: Efficient GPU-based Parameterized Transceiver across Different OFDM Protocols. KSII Trans. Internet Inf. Syst. 7(8): 1911-1932 (2013) - [j4]Yuanwu Lei, Yong Dou, Lei Guo, Jinbo Xu, Jie Zhou, Yazhuo Dong, Hongjian Li:
VLIW coprocessor for IEEE-754 quadruple-precision elementary functions. ACM Trans. Archit. Code Optim. 10(3): 12:1-12:22 (2013) - [j3]Yuanwu Lei, Yong Dou, Yazhuo Dong, Jie Zhou, Fei Xia:
FPGA implementation of an exact dot product and its application in variable-precision floating-point arithmetic. J. Supercomput. 64(2): 580-605 (2013) - [c18]Rongchun Li, Jie Zhou, Yong Dou, Song Guo, Dan Zou, Shi Wang:
A multi-standard efficient column-layered LDPC decoder for Software Defined Radio on GPUs. SPAWC 2013: 724-728 - 2012
- [c17]Jiaqing Xu, Qi Lv, Jie Zhou, Yong Dou:
A self-organizing and self-adaptive French flag Organism based on lateral activation model. IEEE Congress on Evolutionary Computation 2012: 1-8 - [c16]Yunlong Wu, Chen Chen, Huiquan Wang, Jie Zhou, Xinhai Xu:
A malicious code detection method based on statistical analysis. FSKD 2012: 1452-1455 - 2011
- [j2]Yuanwu Lei, Yong Dou, Jie Zhou:
FPGA-Specific Custom VLIW Architecture for Arbitrary Precision Floating-Point Arithmetic. IEICE Trans. Inf. Syst. 94-D(11): 2173-2183 (2011) - [c15]Yuanwu Lei, Yong Dou, Song Guo, Jie Zhou:
FPGA Implementation of Variable-Precision Floating-Point Arithmetic. APPT 2011: 127-141 - [c14]Yuanwu Lei, Yong Dou, Jie Zhou, Sufeng Wang:
VPFPAP: A Special-Purpose VLIW Processor for Variable-Precision Floating-Point Arithmetic. FPL 2011: 252-257 - [c13]Yuanwu Lei, Yong Dou, Li Shen, Jie Zhou, Song Guo:
Special-purposed VLIW architecture for IEEE-754 quadruple precision elementary functions on FPGA. ICCD 2011: 219-225 - [c12]Rongchun Li, Yong Dou, Jie Zhou, Guo-Qing Lei:
A high-throughput reconfigurable Viterbi decoder. WCSP 2011: 1-6 - 2010
- [j1]Yong Dou, Jie Zhou, Guiming Wu, Jingfei Jiang, Yuanwu Lei, Shi-Ce Ni:
A Unified Co-Processor Architecture for Matrix Decomposition. J. Comput. Sci. Technol. 25(4): 874-885 (2010) - [c11]Yong Dou, Yuanwu Lei, Guiming Wu, Song Guo, Jie Zhou, Li Shen:
FPGA accelerating double/quad-double high precision floating-point applications for ExaScale computing. ICS 2010: 325-336
2000 – 2009
- 2009
- [c10]Jie Zhou, Yong Dou, Jianxun Zhao, Fei Xia, Yuanwu Lei, Yuxing Tang:
A Fine-Grained Pipelined Implementation for Large-Scale Matrix Inversion on FPGA. APPT 2009: 110-122 - [c9]Guiming Wu, Yong Dou, Yuanwu Lei, Jie Zhou, Miao Wang, Jingfei Jiang:
A Fine-grained Pipelined Implementation of the LINPACK Benchmark on FPGAs. FCCM 2009: 183-190 - [c8]Yong Dou, Jie Zhou, Xiaoyang Chen, Yuanwu Lei, Jinbo Xu:
FPGA accelerating three QR decomposition algorithms in the unified pipelined framework. FPL 2009: 410-416 - 2008
- [c7]Jinbo Xu, Yong Dou, Jie Zhou:
Multi-access memory architecture for image applications with multiple interested regions. APCCAS 2008: 1576-1579 - [c6]Jie Zhou, Yong Dou, Yuanwu Lei, Yazhuo Dong:
Hybrid-Mode Floating-Point FPGA CORDIC Co-processor. ARC 2008: 254-259 - [c5]Jie Zhou, Yong Dou, Yuanwu Lei, Jinbo Xu, Yazhuo Dong:
Double Precision Hybrid-Mode Floating-Point FPGA CORDIC Co-processor. HPCC 2008: 182-189 - [c4]Jie Zhou, Yazhuo Dong, Yong Dou, Yuanwu Lei:
Dynamic Configurable Floating-Point FFT Pipelines and Hybrid-Mode CORDIC on FPGA. ICESS 2008: 616-620 - [c3]Jinbo Xu, Yong Dou, Jie Zhou:
Rectangularly Multi-Module Memory System with Table-Based Dynamic Addressing Scheme. NAS 2008: 334-341 - 2007
- [c2]Yazhuo Dong, Yong Dou, Jie Zhou:
Optimized Generation of Memory Structure in Compiling Window Operations onto Reconfigurable Hardware. ARC 2007: 110-121 - [c1]Yong Dou, Jie Zhou, Yuanwu Lei, Xingming Zhou:
FPGA SAR Processor with Window Memory Accesses. ASAP 2007: 95-100
Coauthor Index
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