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Bekim Cilku
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Journal Articles
- 2015
- [j2]Bekim Cilku, Roland Kammerer, Peter P. Puschner:
Aligning single path loops to reduce the number of capacity cache misses. SIGBED Rev. 12(1): 13-18 (2015) - [j1]Bekim Cilku, Peter P. Puschner:
Designing a time predictable memory hierarchy for single-path code. SIGBED Rev. 12(2): 16-21 (2015)
Conference and Workshop Papers
- 2017
- [c10]Bekim Cilku
, Wolfgang Puffitsch, Daniel Prokesch, Martin Schoeberl
, Peter P. Puschner
:
Improving Performance of Single-Path Code through a Time-Predictable Memory Hierarchy. ISORC 2017: 76-83 - [c9]Martin Schoeberl
, Bekim Cilku, Daniel Prokesch, Peter P. Puschner
:
Best Practice for Caching of Single-Path Code. WCET 2017: 2:1-2:12 - 2016
- [c8]Peter P. Puschner
, Bekim Cilku
, Daniel Prokesch:
Constructing Time-Predictable MPSoCs: Avoid Conflicts in Temporal Control. MCSoC 2016: 321-328 - 2015
- [c7]Bekim Cilku
, Alfons Crespo
, Peter P. Puschner
, Javier Coronel, Salvador Peiró:
A TDMA-Based arbitration scheme for mixed-criticality multicore platforms. EBCCSP 2015: 1-6 - [c6]Bekim Cilku
, Daniel Prokesch, Peter P. Puschner
:
A Time-Predictable Instruction-Cache Architecture that Uses Prefetching and Cache Locking. ISORC Workshops 2015: 74-79 - 2014
- [c5]Bekim Cilku
, Bernhard Frömel, Peter P. Puschner
:
A dual-layer bus arbiter for mixed-criticality systems with hypervisors. INDIN 2014: 147-151 - 2011
- [c4]Bekim Cilku
, Peter P. Puschner
:
Using a Local Prefetch Strategy to Obtain Temporal Time Predictability. ISORC Workshops 2011: 227-233 - 2010
- [c3]Bekim Cilku
, Peter P. Puschner
:
Towards a Time-Predictable Hierarchical Memory Architecture - Prefetching Options to be Explored. ISORC Workshops 2010: 219-225 - 2009
- [c2]Bekim Cilku
, Aksenti Grnarov:
New algorithms for efficient scheduling in Grid Ad-Hoc networks. ITI 2009: 591-596 - 2007
- [c1]Aksenti Grnarov, Bekim Cilku, Igor Mishkovski, Sonja Filiposka
, Dimitar Trajanov
:
Grid Computing Implementation in Ad Hoc Networks. SCSS (1) 2007: 196-201
Coauthor Index
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