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Andreas Wortmann 0002

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affiliation: City University of Applied Sciences, Bremen, Germany

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2000 – 2009

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2006
[j1]
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  - journals/integration/MullerSGWB06
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  - https://dblp.org/rec/journals/integration/MullerSGWB06
Matthias Müller, Sven Simon, Holger Gryska, Andreas Wortmann, Steffen Buch:
Low power synthesizable register files for processor and IP cores. Integr. 39(2): 131-155 (2006)
2004
[c6]
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Andreas Wortmann, Sven Simon, Matthias Müller:
A High-Speed Transceiver Architecture Implementable as Synthesizable IP Core. DATE 2004: 46-51
[c5]
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Sven Simon, Matthias Müller, Holger Gryska, Andreas Wortmann, Steffen Buch:
An instruction set for the efficient implementation of the CORDIC algorithm. ISCAS (2) 2004: 357-360
[c4]
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Matthias Müller, Andreas Wortmann, Sven Simon, Michael Kugel, Tim Schoenauer:
The impact of clock gating schemes on the power dissipation of synthesizable register files. ISCAS (2) 2004: 609-612
[c3]
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Matthias Müller, Andreas Wortmann, Dominik Mader, Sven Simon:
Register Isolation for Synthesizable Register Files. PATMOS 2004: 228-237
2003
[c2]
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  - conf/iscas/WroblewskiMWSPN03
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Marek Wróblewski, Matthias Müller, Andreas Wortmann, Sven Simon, Wilhelm Pieper, Josef A. Nossek:
A power efficient register file architecture using master latch sharing. ISCAS (5) 2003: 393-396
2002
[c1]
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  - conf/iscas/MuellerWSWBWN02
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Matthias Müller, Andreas Wortmann, Sven Simon, S. Wolter, Steffen Buch, Marek Wróblewski, Josef A. Nossek:
Low power register file architecture for application specific DSPs. ISCAS (4) 2002: 89-92

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