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ORCIDLakshmi N. Reddy
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2020 – today
- 2022
[j7]Rongjian Liang
, Hua Xiang, Diwesh Pandey, Lakshmi N. Reddy, Shyam Ramji, Gi-Joon Nam, Jiang Hu:
Design Rule Violation Prediction at Sub-10-nm Process Nodes Using Customized Convolutional Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(10): 3503-3514 (2022)- [c18]Matthew M. Ziegler, Lakshmi N. Reddy, Robert L. Franch:
Design Flow Parameter Optimization with Multi-Phase Positive Nondeterministic Tuning. ISPD 2022: 29-37 - 2021
- [c17]Rongjian Liang, Jinwook Jung, Hua Xiang, Lakshmi N. Reddy, Alexey Lvov, Jiang Hu, Gi-Joon Nam:
FlowTuner: A Multi-Stage EDA Flow Tuner Exploiting Parameter Knowledge Transfer. ICCAD 2021: 1-9 - 2020
- [c16]Rongjian Liang, Hua Xiang, Diwesh Pandey, Lakshmi N. Reddy, Shyam Ramji, Gi-Joon Nam, Jiang Hu:
DRC Hotspot Prediction at Sub-10nm Process Nodes Using Customized Convolutional Network. ISPD 2020: 135-142
2010 – 2019
- 2018
- [j6]Jinwook Jung, Gi-Joon Nam, Lakshmi N. Reddy, Iris Hui-Ru Jiang, Youngsoo Shin:
OWARU: Free Space-Aware Timing-Driven Incremental Placement With Critical Path Smoothing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(9): 1825-1838 (2018) - [c15]Jiang Hu, Ying Zhou, Yaoguang Wei, Stephen T. Quay, Lakshmi N. Reddy, Gustavo E. Téllez, Gi-Joon Nam:
Interconnect Optimization Considering Multiple Critical Paths. ISPD 2018: 132-138 - 2016
- [c14]Jinwook Jung, Gi-Joon Nam, Lakshmi N. Reddy, Iris Hui-Ru Jiang, Youngsoo Shin:
OWARU: free space-aware timing-driven incremental placement. ICCAD 2016: 8 - [c13]Hua Xiang, Lakshmi N. Reddy, Haifeng Qian, Ching Zhou, Yu-Shiang Lin, Fanchieh Yee, Andrew Sullivan, Pong-Fei Lu:
Gate movement for timing improvement on row based Dual-VDD designs. ISQED 2016: 423-429 - [c12]Mohd Anwar, Sourav Saha, Matthew M. Ziegler, Lakshmi N. Reddy:
Early Scenario Pruning for Efficient Design Space Exploration in Physical Synthesis. VLSID 2016: 116-121 - 2014
- [j5]Yaoguang Wei, Cliff C. N. Sze, Natarajan Viswanathan, Zhuo Li, Charles J. Alpert, Lakshmi N. Reddy, Andrew D. Huber, Gustavo E. Téllez, Douglas Keller, Sachin S. Sapatnekar:
Techniques for scalable and effective routability evaluation. ACM Trans. Design Autom. Electr. Syst. 19(2): 17:1-17:37 (2014) - 2013
- [c11]Haoxing Ren, Ruchir Puri, Lakshmi N. Reddy, Smita Krishnaswamy, Cindy Washburn, Joel Earl, Joachim Keinert:
Intuitive ECO synthesis for high performance circuits. DATE 2013: 1002-1007 - [c10]Hua Xiang, Lakshmi N. Reddy, Louise Trevillyan, Ruchir Puri:
Depth controlled symmetric function fanin tree restructure. ICCAD 2013: 585-591 - 2012
- [c9]Yaoguang Wei, Cliff C. N. Sze, Natarajan Viswanathan, Zhuo Li, Charles J. Alpert, Lakshmi N. Reddy, Andrew D. Huber, Gustavo E. Téllez, Douglas Keller, Sachin S. Sapatnekar:
GLARE: global and local wiring aware routability evaluation. DAC 2012: 768-773 - 2011
- [j4]Joshua Friedrich, Ruchir Puri, Uwe Brandt, Markus Bühler, Jack DiLullo, Jeremy Hopkins, Mozammel Hossain, Michael A. Kazda, Joachim Keinert, Zahi M. Kurzum, Douglass Lamb, Alice Lee, Frank Musante, Jens Noack, Peter J. Osler, Stephen D. Posluszny, Haifeng Qian, Shyam Ramji, Vasant B. Rao, Lakshmi N. Reddy, Haoxing Ren, Thomas E. Rosser, Benjamin R. Russell, Cliff C. N. Sze, Gustavo E. Téllez:
Design methodology for the IBM POWER7 microprocessor. IBM J. Res. Dev. 55(3): 9 (2011) - 2010
- [c8]Hua Xiang, Haoxing Ren, Louise Trevillyan, Lakshmi N. Reddy, Ruchir Puri, Minsik Cho:
Logical and physical restructuring of fan-in trees. ISPD 2010: 67-74
2000 – 2009
- 2008
- [r1]Charles J. Alpert, Nathaniel Hieter, Arjen Mets, Ruchir Puri, Lakshmi N. Reddy, Haoxing Ren, Louise Trevillyan:
Placement-Driven Synthesis Design Closure Tool. Handbook of Algorithms for Physical Design Automation 2008 - 2004
- [j3]Louise Trevillyan, David S. Kung, Ruchir Puri, Lakshmi N. Reddy, Michael A. Kazda:
An Integrated Environment for Technology Closure of Deep-Submicron IC Designs. IEEE Des. Test Comput. 21(1): 14-22 (2004) - 2000
- [c7]Wilm E. Donath, Prabhakar Kudva, Leon Stok, Paul Villarrubia, Lakshmi N. Reddy, Andrew Sullivan, Kanad Chakraborty:
Transformational Placement and Synthesis. DATE 2000: 194-201
1990 – 1999
- 1999
- [c6]Wilm E. Donath, Prabhakar Kudva, Lakshmi N. Reddy:
Performance Driven Optimization of Network Length in Physical Placement. ICCD 1999: 258-265 - 1996
- [j2]Leon Stok, David S. Kung, Daniel Brand, Anthony D. Drumm, Andrew J. Sullivan, Lakshmi N. Reddy, Nathaniel Hieter, David J. Geiger, Han Hsun Chao, Peter J. Osler:
BooleDozer: Logic synthesis for ASICs. IBM J. Res. Dev. 40(4): 407-430 (1996) - 1993
- [j1]Irith Pomeranz, Lakshmi N. Reddy, Sudhakar M. Reddy:
COMPACTEST: a method to generate compact test sets for combinational circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(7): 1040-1049 (1993) - 1992
- [c5]Irith Pomeranz, Lakshmi N. Reddy, Sudhakar M. Reddy:
SPADES: a simulator for path delay faults in sequential circuits. EURO-DAC 1992: 428-435 - [c4]Lakshmi N. Reddy, Irith Pomeranz, Sudhakar M. Reddy:
COMPACTEST-II: a method to generate compact two-pattern test sets for combinational logic circuits. ICCAD 1992: 568-574 - [c3]Sandip Kundu, Leendert M. Huisman, Indira Nair, Vijay S. Iyengar, Lakshmi N. Reddy:
A Small Test Generator for Large Designs. ITC 1992: 30-40 - 1991
- [c2]Irith Pomeranz, Sudhakar M. Reddy, Lakshmi N. Reddy:
Increasing Fault Coverage for Synchronous Sequential Circuits by the Multiple Observation Time Test Strategy. ICCAD 1991: 454-457 - [c1]Irith Pomeranz, Lakshmi N. Reddy, Sudhakar M. Reddy:
COMPACTEST: A Method to Generate Compact Test Sets for Combinatorial Circuits. ITC 1991: 194-203
Coauthor Index
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