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Jinook Song
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2020 – today
- 2023
- [c8]Seah Kim, Hyoukjun Kwon, Jinook Song, Jihyuck Jo, Yu-Hsin Chen, Liangzhen Lai, Vikas Chandra:
DREAM: A Dynamic Scheduler for Dynamic Real-time Multi-model ML Workloads. ASPLOS (4) 2023: 73-86 - [c7]Hyoukjun Kwon, Krishnakumar Nair, Jamin Seo, Jason Yik, Debabrata Mohapatra, Dongyuan Zhan, Jinook Song, Peter Capak, Peizhao Zhang, Peter Vajda, Colby R. Banbury, Mark Mazumder, Liangzhen Lai, Ashish Sirasao, Tushar Krishna, Harshit Khaitan, Vikas Chandra, Vijay Janapa Reddi:
XRBench: An Extended Reality (XR) Machine Learning Benchmark Suite for the Metaverse. MLSys 2023 - 2022
- [i2]Hyoukjun Kwon, Krishnakumar Nair, Jamin Seo, Jason Yik, Debabrata Mohapatra, Dongyuan Zhan, Jinook Song, Peter Capak, Peizhao Zhang, Peter Vajda, Colby R. Banbury, Mark Mazumder, Liangzhen Lai, Ashish Sirasao, Tushar Krishna, Harshit Khaitan, Vikas Chandra, Vijay Janapa Reddi:
XRBench: An Extended Reality (XR) Machine Learning Benchmark Suite for the Metaverse. CoRR abs/2211.08675 (2022) - [i1]Seah Kim, Hyoukjun Kwon, Jinook Song, Jihyuck Jo, Yu-Hsin Chen, Liangzhen Lai, Vikas Chandra:
SDRM3: A Dynamic Scheduler for Dynamic Real-time Multi-model ML Workloads. CoRR abs/2212.03414 (2022) - 2020
- [c6]Young-Duk Kim, Wookyeong Jeong, Lakkyung Jung, Dongsuk Shin, Jae Geun Song, Jinook Song, Hyeokman Kwon, Jaeyoung Lee, Jaesu Jung, Myungjin Kang, Jaehun Jeong, Yoonjoo Kwon, Nak Hee Seong:
2.4 A 7nm High-Performance and Energy-Efficient Mobile Application Processor with Tri-Cluster CPUs and a Sparsity-Aware NPU. ISSCC 2020: 48-50
2010 – 2019
- 2019
- [c5]Jinook Song, Yunkyo Cho, Jun-Seok Park, Jun-Woo Jang, Sehwan Lee, Joon-Ho Song, Jae-Gon Lee, Inyup Kang:
An 11.5TOPS/W 1024-MAC Butterfly Structure Dual-Core Sparsity-Aware Neural Processing Unit in 8nm Flagship Mobile SoC. ISSCC 2019: 130-132 - 2015
- [j3]Jinook Song:
Hardware Reduction of MASH Delta-Sigma Modulator Based on Partially Folded Architecture. IEEE Trans. Circuits Syst. II Express Briefs 62-II(10): 967-971 (2015) - 2011
- [c4]Jinook Song, In-Cheol Park:
Division-less high-radix interleaved modular multiplication using a scaled modulus. ISOCC 2011: 215-218 - [c3]Youngjoo Lee, Jinook Song, In-Cheol Park:
Statistical modeling of capacitor mismatch effects for successive approximation register ADCs. ISOCC 2011: 302-305 - 2010
- [j2]Jinook Song, In-Cheol Park:
Spur-Free MASH Delta-Sigma Modulation. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(9): 2426-2437 (2010)
2000 – 2009
- 2009
- [j1]Jinook Song, In-Cheol Park:
Pipelined Discrete Wavelet Transform Architecture Scanning Dual Lines. IEEE Trans. Circuits Syst. II Express Briefs 56-II(12): 916-920 (2009) - [c2]Jinook Song, In-Cheol Park:
Novel Pipelined DWT Architecture for Dual-line Scan. ISCAS 2009: 373-376 - 2007
- [c1]Jung-Wook Kim, Jinook Song, Seokho Lee, In-Cheol Park:
Tiled Interleaving for Multi-Level 2-D Discrete Wavelet Transform. ISCAS 2007: 3984-3987
Coauthor Index
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