Nagendra Dwarakanath Gulur

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with R. Govindarajan

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Publications

2017
[i1]
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  - journals/corr/abs-1712-04303
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Jayvant Anantpur, Nagendra Dwarakanath Gulur, Shivaram Kalyanakrishnan, Shalabh Bhatnagar, R. Govindarajan:
RLWS: A Reinforcement Learning based GPU Warp Scheduler. CoRR abs/1712.04303 (2017)
2016
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  - conf/memsys/GulurGM16
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Nagendra Gulur, R. Govindarajan, Mahesh Mehendale:
MicroRefresh: Minimizing Refresh Overhead in DRAM Caches. MEMSYS 2016: 350-361
2015
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  - conf/wosp/GulurMG15
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Nagendra Dwarakanath Gulur, Mahesh Mehendale, Ramaswamy Govindarajan:
A Comprehensive Analytical Performance Model of DRAM Caches. ICPE 2015: 157-168
2014
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  - conf/micro/GulurMMG14
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Nagendra Dwarakanath Gulur, Mahesh Mehendale, R. Manikantan, R. Govindarajan:
Bi-Modal DRAM Cache: Improving Hit Rate, Hit Latency and Bandwidth. MICRO 2014: 38-50
[c3]
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  - conf/sigmetrics/GulurMMG14
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Nagendra Gulur, Mahesh Mehendale, Raman Manikantan, Ramaswamy Govindarajan:
ANATOMY: an analytical model of memory system performance. SIGMETRICS 2014: 505-517
2012
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  - conf/ics/GulurMMG12
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Nagendra Dwarakanath Gulur, R. Manikantan, Mahesh Mehendale, R. Govindarajan:
Multiple sub-row buffers in DRAM: unlocking performance and energy improvement opportunities. ICS 2012: 257-266
2011
[c1]
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  - conf/IEEEpact/GulurMGM11
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Nagendra Dwarakanath Gulur, R. Manikantan, R. Govindarajan, Mahesh Mehendale:
Row-Buffer Reorganization: Simultaneously Improving Performance and Reducing Energy in DRAMs. PACT 2011: 189-190

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