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Satish Anand Verkila

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2000 – 2009

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2008
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Satish Anand Verkila, Siva Kumar Bondada, Bharadwaj S. Amrutur:
A 100MHz to 1GHz, 0.35V to 1.5V Supply 256 x 64 SRAM Block Using Symmetrized 9T SRAM Cell with Controlled Read. VLSI Design 2008: 560-565

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