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Ji-Yeon Shin
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2020 – today
- 2021
- [j1]Dae-Hoon Na, Jang-Woo Lee, Seon-Kyoo Lee, Hwasuk Cho, Junha Lee, Manjae Yang, Eunjin Song, Anil Kavala, Tongsung Kim, Dong-Su Jang, Youngmin Jo, Ji-Yeon Shin, Byung-Kwan Chun, Tae-Sung Lee, Byunghoon Jeong, Chiweon Yoon, Dongku Kang, Seungjae Lee, Jungdon Ihm, Dae-Seok Byeon, Jinyub Lee, Jai Hyuk Song:
A 1.8-Gb/s/Pin 16-Tb NAND Flash Memory Multi-Chip Package With F-Chip for High-Performance and High-Capacity Storage. IEEE J. Solid State Circuits 56(4): 1129-1140 (2021)
2010 – 2019
- 2015
- [c2]Hyun-Jin Kim, Jeong-Don Lim, Jang-Woo Lee, Dae-Hoon Na, Joon-Ho Shin, Chae-Hoon Kim, Seungwoo Yu, Ji-Yeon Shin, Seon-Kyoo Lee, Devraj Rajagopal, Sang-Tae Kim, Kyeong-Tae Kang, Jeong-Joon Park, Yongjin Kwon, Min-Jae Lee, Sunghoon Kim, Seunghoon Shin, Hyunggon Kim, Jin-Tae Kim, Ki-Sung Kim, Han-Sung Joo, Chanjin Park, Jae-Hwan Kim, Man-Joong Lee, Do-Kook Kim, Hyang-Ja Yang, Dae-Seok Byeon, Ki-Tae Park, Kyehyun Kyung, Jeong-Hyuk Choi:
7.6 1GB/s 2Tb NAND flash multi-chip package with frequency-boosting interface chip. ISSCC 2015: 1-3 - 2011
- [c1]Ki-Tae Park, Ohsuk Kwon, Sangyong Yoon, Myung-Hoon Choi, In-Mo Kim, Bo-Geun Kim, Min-Seok Kim, Yoon-Hee Choi, Seung-Hwan Shin, Youngson Song, Joo-Yong Park, Jae-Eun Lee, Chang-Gyu Eun, Ho-Chul Lee, Hyeong-Jun Kim, Jun-Hee Lee, Jong-Young Kim, Tae-Min Kweon, Hyun-Jun Yoon, Taehyun Kim, Dong-Kyo Shim, Jongsun Sel, Ji-Yeon Shin, Pansuk Kwak, Jin-Man Han, Keon-Soo Kim, Sungsoo Lee, Youngho Lim, Tae-Sung Jung:
A 7MB/s 64Gb 3-bit/cell DDR NAND flash memory in 20nm-node technology. ISSCC 2011: 212-213
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