Power gating architecture implementation inside clock period to reduce power.

Wed, 01 Jan 2014 00:00:00 +0100

Debanjali Nath, Priyanka Choudhury , Abhishek Nag , Sambhu Nath Pradhan :
Power gating architecture implementation inside clock period to reduce power. Int. J. Comput. Aided Eng. Technol. 6(3): 310-323 (2014)