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2020 – today
- 2024
[j32]David C. C. Freitas
, David F. M. Mota, David Coelho, Humberto Fontinele, Alexandre Coelho, Jarbas Silveira, Lirida Naviner, João Mota, César A. M. Marcon:
Check-Bit Region Exploration in Two-Dimensional Error Correction Codes. IEEE Access 12: 131830-131841 (2024)- 2023
- [j31]Felipe G. A. e Silva, Alan Cadore Pinheiro, Jarbas A. N. Silveira, César A. M. Marcon:
A Triple Burst Error Correction Based on Region Selection Code. IEEE Trans. Very Large Scale Integr. Syst. 31(8): 1214-1222 (2023) - [c100]Ayalon Angelo de Moraes Filho, Guilherme Schreiber, Julio Alexander Sieg, Maicon Diogo Much, Vanessa de Moura Bartoski, César A. M. Marcon:
Methods to Estimate Respiratory Rate Using the Photoplethysmography Signal. HEALTHINF 2023: 445-452 - [c99]Maicon Diogo Much, Julio Alexander Sieg, Ayalon Angelo de Moraes Filho, Vanessa de Moura Bartoski, Guilherme Schreiber, César A. M. Marcon:
LifeSeniorProfile: A Multisensor Dataset for Elderly Real-time Activity Track. HEALTHINF 2023: 453-460 - [c98]Edilson Filho, Jarbas Silveira, César A. M. Marcon:
Blockchain Applied In Decentralization of Ground Stations To Educational Nanosatellites. LATS 2023: 1-5 - [c97]Marco P. Stefani, César A. M. Marcon, Felipe G. A. e Silva, Jarbas Silveira:
Memory Controller with Adaptive ECC for Reliable System Operation. SBCCI 2023: 1-6 - [i2]David C. C. Freitas, David F. M. Mota, Clailton Lopes, Daniel Simões, Jarbas Silveira, João Cesar M. Mota, César A. M. Marcon:
Exploration and Analysis of Combinations of Hamming Codes in 32-bit Memories. CoRR abs/2306.16259 (2023) - 2022
- [j30]Felipe G. A. e Silva, Adahil Muniz, Marco P. Stefani, Jarbas Silveira, César A. M. Marcon:
Expanding Column Line Code Adaptive (CLC-A) for Protecting 32-and 64-Bit Data. IEEE Des. Test 39(2): 15-22 (2022) - [j29]David C. C. Freitas, Jarbas Silveira, César A. M. Marcon, Lirida A. B. Naviner, João Cesar M. Mota:
OPCoSA: an Optimized Product Code for space applications. Integr. 84: 131-141 (2022) - [j28]Mário Saldanha, Gustavo Sanchez, César A. M. Marcon, Luciano Agostini:
Configurable Fast Block Partitioning for VVC Intra Coding Using Light Gradient Boosting Machine. IEEE Trans. Circuits Syst. Video Technol. 32(6): 3947-3960 (2022) - [c96]Mário Saldanha, Gustavo Sanchez, César A. M. Marcon, Luciano Agostini:
Fast Transform Decision Scheme for VVC Intra-Frame Prediction Using Decision Trees. ISCAS 2022: 1948-1952 - [c95]Jorge Reis, Jarbas Silveira, César A. M. Marcon:
Impact of failures in a MPSoC with shared coprocessors to extend the RISC-V ISA. LADC 2022: 29-34 - 2021
- [j27]Mário Saldanha, Gustavo Sanchez, César A. M. Marcon, Luciano Agostini:
Fast block partitioning scheme for chrominance intra prediction of versatile video coding standard. J. Electronic Imaging 30(5) (2021) - [j26]Mário Saldanha, Gustavo Sanchez, César A. M. Marcon, Luciano Agostini:
Performance analysis of VVC intra coding. J. Vis. Commun. Image Represent. 79: 103202 (2021) - [j25]Ramon Fernandes, Gustavo Sanchez, Rodrigo Cataldo, Luciano Agostini, César A. M. Marcon:
Using curved angular intra-frame prediction to improve video coding efficiency. J. Vis. Commun. Image Represent. 80: 103291 (2021) - [j24]David C. C. Freitas, David F. M. Mota, César A. M. Marcon, Jarbas A. N. Silveira, João Cesar M. Mota:
LPC: An Error Correction Code for Mitigating Faults in 3D Memories. IEEE Trans. Computers 70(11): 2001-2012 (2021) - [j23]Rodrigo Cataldo, Ramon Fernandes, Kevin J. M. Martin, Jarbas Silveira, Gustavo Sanchez, Johanna Sepúlveda, César A. M. Marcon, Jean-Philippe Diguet:
Subutai: Speeding Up Legacy Parallel Applications Through Data Synchronization. IEEE Trans. Parallel Distributed Syst. 32(5): 1102-1116 (2021) - [c94]Maicon Diogo Much, César A. M. Marcon, Fabiano Hessel, Alfredo Cataldo Neto:
LifeSenior - A Health Monitoring IoT System Based on Deep Learning Architecture. HCI (26) 2021: 293-306 - [c93]Geaninne Lopes, Iaçanã I. Weber, César A. M. Marcon, Fernando Gehm Moraes:
Chronos: An Abstract NoC-based Manycore with Preserved Temporal and Spatial Traffic Distribution. LASCAS 2021: 1-4 - [c92]Mário Saldanha, Gustavo Sanchez, César A. M. Marcon, Luciano Agostini:
Analysis of VVC Intra Prediction Block Partitioning Structure. VCIP 2021: 1-5 - [c91]Mário Saldanha, Gustavo Sanchez, César A. M. Marcon, Luciano Agostini:
Learning-Based Complexity Reduction Scheme for VVC Intra-Frame Prediction. VCIP 2021: 1-5 - [c90]Antonio Rodrigo Delepiane de Vit, César A. M. Marcon, Sidnei Renato Silveira, Ricardo Tombesi Macedo, Raul Ceretta Nunes:
A Trajectory Inference-based Technique for Energy Efficient Store-and-Forward Technology. WD 2021: 1-5 - 2020
- [j22]Gustavo Sanchez, Ramon Fernandes, Rodrigo Cataldo, Luciano Agostini, Leonel Sousa, César A. M. Marcon:
Multicore Parallelism Exploration Targeting 3D-HEVC Intra-Frame Prediction. IEEE Des. Test 37(3): 15-21 (2020) - [j21]David C. C. Freitas, David F. M. Mota, Roger C. Goerl, César A. M. Marcon, Fabian Vargas, Jarbas A. N. Silveira, João Cesar M. Mota:
PCoSA: A product error correction code for use in memory devices targeting space applications. Integr. 74: 71-80 (2020) - [j20]Gustavo Sanchez, Luciano Agostini, Leonel Sousa, César A. M. Marcon:
Parallelism exploration for 3D high-efficiency video coding depth modeling mode one. J. Real Time Image Process. 17(4): 787-797 (2020) - [j19]Alan Cadore Pinheiro, Daniel A. B. Tavares, Felipe G. A. e Silva, Jarbas Silveira, César A. M. Marcon:
Optimized buffer protection for network-on-chip based on Error Correction Code. Microelectron. J. 100: 104799 (2020) - [j18]Gustavo Sanchez, Mário Saldanha, Ramon Fernandes, Rodrigo Cataldo, Luciano Agostini, César A. M. Marcon:
3D-HEVC Bipartition Modes Encoder and Decoder Design Targeting High-Resolution Videos. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(2): 415-427 (2020) - [j17]Mário Saldanha, Gustavo Sanchez, César A. M. Marcon, Luciano Agostini:
Tile Adaptation for Workload Balancing of 3D-HEVC Encoder in Homogeneous Multicore Systems. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. 67-I(5): 1704-1714 (2020) - [j16]Mário Saldanha, Gustavo Sanchez, César A. M. Marcon, Luciano Agostini:
Fast 3D-HEVC Depth Map Encoding Using Machine Learning. IEEE Trans. Circuits Syst. Video Technol. 30(3): 850-861 (2020) - [j15]Ramon Fernandes, César A. M. Marcon, Rodrigo Cataldo, Johanna Sepúlveda:
Using Smart Routing for Secure and Dependable NoC-Based MPSoCs. IEEE/ACM Trans. Netw. 28(3): 1158-1171 (2020) - [c89]Christopher Moura, Mário Saldanha, Gustavo Sanchez, César A. M. Marcon, Marcelo Schiavon Porto, Luciano Agostini:
Fast Intra Mode Decision for 3D-HEVC Depth Map Coding using Decision Trees. ICECS 2020: 1-4 - [c88]Mário Saldanha, Gustavo Sanchez, César A. M. Marcon, Luciano Agostini:
Complexity Analysis Of VVC Intra Coding. ICIP 2020: 3119-3123 - [c87]Mário Saldanha, Gustavo Sanchez, César A. M. Marcon, Luciano Agostini:
Fast Partitioning Decision Scheme for Versatile Video Coding Intra-Frame Prediction. ISCAS 2020: 1-5 - [c86]Iaçanã I. Weber, Geaninne Marchezan, Luciano L. Caimi, César A. M. Marcon, Fernando Gehm Moraes:
Open-Source NoC-Based Many-Core for Evaluating Hardware Trojan Detection Methods. ISCAS 2020: 1-5 - [c85]David C. C. Freitas, David F. M. Mota, Daniel Simões, Clailton Lopes, Roger C. Goerl, César Augusto Missio Marcon, Jarbas A. N. Silveira, João Cesar M. Mota:
Error Coverage, Reliability and Cost Analysis of Fault Tolerance Techniques for 32-bit Memories used on Space Missions. ISQED 2020: 250-254 - [c84]Pedro Lima, Caio Vieira, Jorge Reis, Alexandre Almeida, Jarbas Silveira, Roger C. Goerl, César A. M. Marcon:
Optimizing RISC-V ISA Usage by Sharing Coprocessors on MPSoC. LATS 2020: 1-5 - [c83]Felipe G. A. e Silva, Adahil Muniz, Jarbas Silveira, César A. M. Marcon:
CLC-A: An Adaptive Implementation of the Column Line Code (CLC) ECC. SBCCI 2020: 1-6
2010 – 2019
- 2019
- [j14]Ricardo M. Czekster, Thais Webber, Alessandra H. Jandrey, César Augusto Missio Marcon:
Selection of enterprise resource planning software using analytic hierarchy process. Enterp. Inf. Syst. 13(6): 895-915 (2019) - [j13]Gustavo Sanchez, Mário Saldanha, Luciano Agostini, César A. M. Marcon:
Analysis of parallel encoding using tiles in 3D High Efficiency Video Coding. Signal Image Video Process. 13(6): 1079-1086 (2019) - [j12]Gustavo Sanchez, Jarbas Silveira, Luciano Volcan Agostini, César A. M. Marcon:
Performance Analysis of Depth Intra-Coding in 3D-HEVC. IEEE Trans. Circuits Syst. Video Technol. 29(8): 2509-2520 (2019) - [c82]Mário Saldanha, Gustavo Sanchez, Bruno Zatt, César A. M. Marcon, Luciano Agostini:
TITAN: Tile Timing-Aware Balancing Algorithm for Speeding Up the 3D-HEVC Intra Coding. ISCAS 2019: 1-5 - [c81]Alan Cadore Pinheiro, Jarbas A. N. Silveira, Daniel A. B. Tavares, Felipe G. A. e Silva, César A. M. Marcon:
Optimized Fault-Tolerant Buffer Design for Network-on-Chip Applications. LASCAS 2019: 217-220 - 2018
- [j11]Felipe G. A. e Silva, Jardel Silveira, Jarbas Silveira, César A. M. Marcon, Fabian Vargas, Otávio Alcântara de Lima Jr.:
An Extensible Code for Correcting Multiple Cell Upset in Memory Arrays. J. Electron. Test. 34(4): 417-433 (2018) - [j10]Gustavo Sanchez, Luciano Volcan Agostini, César A. M. Marcon:
A reduced computational effort mode-level scheme for 3D-HEVC depth maps intra-frame prediction. J. Vis. Commun. Image Represent. 54: 193-203 (2018) - [c80]Rodrigo Cataldo, Ramon Fernandes, Kevin J. M. Martin, Johanna Sepúlveda, Altamiro Amadeu Susin, César A. M. Marcon, Jean-Philippe Diguet:
Subutai: distributed synchronization primitives in NoC interfaces for legacy parallel-applications. DAC 2018: 83:1-83:6 - [c79]Mário Saldanha, Gustavo Sanchez, César A. M. Marcon, Luciano Volcan Agostini:
Fast 3D-Hevc Depth Maps Intra-Frame Prediction Using Data Mining. ICASSP 2018: 1738-1742 - [c78]Gustavo Sanchez, Ramon Fernandes, Rodrigo Cataldo, Luciano Agostini, César A. M. Marcon:
Low Area Reconfigurable Architecture for 3D-HEVC DMMs Decoder Targeting 1080p Videos. ICECS 2018: 201-204 - [c77]Ramon Fernandes, Gustavo Sanchez, Rodrigo Cataldo, Luciano Agostini, César A. M. Marcon:
Least-Squares Approximation Surfaces for High Quality Intra-Frame Prediction in Future Video Standards. ICECS 2018: 205-208 - [c76]Gustavo Sanchez, Ramon Fernandes, Luciano Volcan Agostini, César A. M. Marcon:
DCDM-Intra: Dynamically Configurable 3D-HEVC Depth Maps Intra-Frame Prediction Algorithm. ICIP 2018: 1782-1786 - [c75]Gustavo Sanchez, Luciano Volcan Agostini, César A. M. Marcon:
High Efficient Architecture for 3D-HEVC DMM-1 Decoder Targeting 1080p Videos. ISCAS 2018: 1-5 - [c74]F. Tubiello, Leticia Bolzani Poehls, Thais Webber, César Augusto Missio Marcon, Fabian Vargas:
A path energy control technique for energy efficiency on wireless sensor networks. LASCAS 2018: 1-4 - [c73]Antonio Rodrigo Delepiane de Vit, César A. M. Marcon, Raul Ceretta Nunes, Thais Webber, Gustavo Sanchez, Carlos Oberdan Rolim:
Energy saving on DTN using trajectory inference model. SAC 2018: 2132-2135 - [c72]Gustavo Sanchez, Luciano Agostini, Leonel Sousa, César A. M. Marcon:
3D-HEVC DMM-1 Parallelism Exploration Targeting Multicore Systems. SBCCI 2018: 1-5 - [c71]Gustavo Sanchez, Mário Saldanha, Luciano Volcan Agostini, César A. M. Marcon:
Hardware-Oriented Wedgelet Evaluation Skip for DMM-1 in 3D-HEVC. SBCCI 2018: 1-5 - [c70]Hemanta Kumar Mondal, Rodrigo Cadore Cataldo, César Augusto Missio Marcon, Kevin J. M. Martin, Sujay Deb, Jean-Philippe Diguet:
Broadcast- and Power-Aware Wireless NoC for Barrier Synchronization in Parallel Computing. SoCC 2018: 1-6 - 2017
- [j9]Gustavo Sanchez, César A. M. Marcon, Luciano Volcan Agostini:
Real-time scalable hardware architecture for 3D-HEVC bipartition modes. J. Real Time Image Process. 13(1): 71-83 (2017) - [j8]César A. M. Marcon, Thais Webber, Altamiro Amadeu Susin:
Models of computation for NoC mapping: Timing and energy saving awareness. Microelectron. J. 60: 129-143 (2017) - [c69]Gustavo Sanchez, Mário Saldanha, Luciano Volcan Agostini, César A. M. Marcon:
Depth modeling modes complexity control system for the 3D-HEVC video encoder. EUSIPCO 2017: 1021-1025 - [c68]Gustavo Sanchez, Mário Saldanha, Bruno Zatt, Marcelo Schiavon Porto, Luciano Volcan Agostini, César A. M. Marcon:
Edge-aware depth motion estimation - A complexity reduction scheme for 3D-HEVC. EUSIPCO 2017: 1524-1528 - [c67]Gustavo Sanchez, Luciano Volcan Agostini, César A. M. Marcon:
Complexity reduction by modes reduction in RD-list for intra-frame prediction in 3D-HEVC depth maps. ISCAS 2017: 1-4 - [c66]Felipe G. A. e Silva, Walter Magalhaes, Jarbas Silveira, Joao Marcelo Ferreira, Philippe de S. Magalhães, Otávio A. de Lima, César A. M. Marcon:
Evaluation of multiple bit upset tolerant codes for NoCs buffering. LASCAS 2017: 1-4 - [c65]Ronaldo Milfont, Paulo Cortez, Alan Cadore Pinheiro, Joao Marcelo Ferreira, Jarbas Silveira, Rafael Mota, César A. M. Marcon:
Analysis of routing algorithms generation for irregular NoC topologies. LATS 2017: 1-5 - [c64]Antonio Rodrigo Delepiane de Vit, César A. M. Marcon, Raul Ceretta Nunes:
Signal strength as support to mobility detection on failure detectors. SAC 2017: 647-650 - [c63]Gustavo Sanchez, Filipo Mór, Luciano Volcan Agostini, César A. M. Marcon:
Low-area scalable hardware architecture for DMM-1 encoder of 3D-HEVC video coding standard. SBCCI 2017: 36-40 - [c62]Johanna Sepúlveda, Ramon Fernandes, César A. M. Marcon, Daniel Florez, Georg Sigl:
A security-aware routing implementation for dynamic data protection in zone-based MPSoC. SBCCI 2017: 59-64 - [c61]Ronaldo T. P. Milfont, Rafael Goncalves Mota, João Marcelo Ferreira, Paulo César Cortez, César A. M. Marcon, Daniel A. B. Tavares, Jarbas A. N. Silveira:
Latency reduction of fault-tolerant NoCs by employing multiple paths. SBCCI 2017: 72-78 - [c60]Felipe G. A. e Silva, Otávio A. de Lima, Walter da C. Freitas, Fabian Vargas, Jarbas Silveira, César A. M. Marcon:
An efficient, low-cost ECC approach for critical-application memories. SBCCI 2017: 198-203 - 2016
- [j7]Gustavo Sanchez, Lucas Jordani, César A. M. Marcon, Luciano Volcan Agostini:
DFPS: a fast pattern selector for depth modeling mode 1 in three-dimensional high-efficiency video coding standard. J. Electronic Imaging 25(6): 63011 (2016) - [j6]Jarbas Silveira, César A. M. Marcon, Paulo Cortez, Giovanni Cordeiro Barroso, Joao Marcelo Ferreira, Rafael Mota:
Scenario preprocessing approach for the reconfiguration of fault-tolerant NoC-based MPSoCs. Microprocess. Microsystems 40: 137-153 (2016) - [c59]Gustavo Sanchez, Rodrigo Cataldo, Ramon Fernandes, Luciano Volcan Agostini, César A. M. Marcon:
3D-HEVC depth maps intra prediction complexity analysis. ICECS 2016: 348-351 - [c58]Gustavo Sanchez, Mário Saldanha, Marcelo Schiavon Porto, Bruno Zatt, Luciano Volcan Agostini, César A. M. Marcon:
Real-time simplified edge detector architecture for 3D-HEVC depth maps coding. ICECS 2016: 352-355 - [c57]Rodrigo Cataldo, Guilherme Korol, Ramon Fernandes, Gustavo Sanchez, Debora Matos, César A. M. Marcon:
Evaluation of emerging TSV-enabled main memories on the PARSEC benchmark. ICECS 2016: 408-411 - [c56]Marcelo Linck, Gabriel Paz, Augusto Santos, César A. M. Marcon:
Software-based mechanism for Network-on-Chip performance increase. ICECS 2016: 628-631 - [c55]Rafael Goncalves Mota, Jarbas Silveira, Jardel Silveira, Lucas Brahm, Avelino F. Zorzo, Filipo Novo Mor, César A. M. Marcon:
Efficient routing table minimization for fault-tolerant irregular Network-on-Chip. ICECS 2016: 632-635 - [c54]Adelcio Biazi, César A. M. Marcon, Fauzi de M. Shubeita, Leticia B. Poehls, Thais Webber, Fabian Vargas:
A dynamic TDMA-based sleep scheduling to minimize WSN energy consumption. ICNSC 2016: 1-6 - [c53]Marcelo Ruaro, Felipe B. Lazzarotto, César A. M. Marcon, Fernando Gehm Moraes:
DMNI: A specialized network interface for NoC-based MPSoCs. ISCAS 2016: 1202-1205 - [c52]Joao Marcelo Ferreira, Jarbas Silveira, Jardel Silveira, Rodrigo Cataldo, Thais Webber, Fernando Gehm Moraes, César A. M. Marcon:
Efficient traffic balancing for NoC routing latency minimization. ISCAS 2016: 2599-2602 - [c51]Johanna Sepúlveda, Daniel Florez, Ramon Fernandes, César A. M. Marcon, Guy Gogniat, Georg Sigl:
Towards risk aware NoCs for data protection in MPSoCs. ReCoSoC 2016: 1-8 - [c50]Rodrigo Cataldo, Guilherme Korol, Ramon Fernandes, Debora Matos, César A. M. Marcon:
Architectural exploration of Last-Level Caches targeting homogeneous multicore systems. SBCCI 2016: 1-6 - [c49]Ramon Fernandes, César A. M. Marcon, Rodrigo Cataldo, Jarbas Silveira, Georg Sigl, Martha Johanna Sepúlveda:
A security aware routing approach for NoC-based MPSoCs. SBCCI 2016: 1-6 - [c48]Gustavo Sanchez, Luciano Volcan Agostini, César A. M. Marcon:
Energy-aware light-weight DMM-1 patterns decoders with efficiently storage in 3D-HEVC. SBCCI 2016: 1-6 - 2015
- [c47]Ramon Fernandes, Bruno S. Oliveira, Johanna Sepúlveda, César A. M. Marcon, Fernando Gehm Moraes:
A non-intrusive and reconfigurable access control to secure NoCs. ICECS 2015: 316-319 - [c46]Omar Andrés Carmona Cortes, Mônica Sakuray Pais, Filipo Novo Mor, Andrew Rau-Chaplin, César Augusto Missio Marcon:
Differential Evolution on a GPGPU: The Influence of Parameters on Speedup and the Quality of Solutions. IPDPS Workshops 2015: 299-306 - [c45]Marco P. Stefani, Thais Webber, Ramon Fernandes, Rodrigo Cataldo, Leticia B. Poehls, César A. M. Marcon:
Task partitioning optimization algorithm for energy saving and load balance on NoC-based MPSoCs. ISQED 2015: 130-134 - [c44]Jarbas Silveira, Mathieu Bodin, Joao Marcelo Ferreira, Alan Cadore Pinheiro, Thais Webber, César A. M. Marcon:
A fault prediction module for a fault tolerant NoC operation. ISQED 2015: 284-288 - [c43]Jarbas Silveira, César A. M. Marcon, Paulo Cortez, Giovanni Cordeiro Barroso, Joao Marcelo Ferreira, Rafael Mota:
Preprocessing of Scenarios for Fast and Efficient Routing Reconfiguration in Fault-Tolerant NoCs. PDP 2015: 404-411 - [c42]Jarbas Silveira, Paulo Cortez, Alan Cadore Pinheiro, Rafael Mota, César A. M. Marcon, Lucas Brahm, Ramon Fernandes:
Smart Reconfiguration Approach for Fault-Tolerant NoC Based MPSoCs. SBCCI 2015: 27:1-27:6 - [c41]Ramon Fernandes, Lucas Brahm, Thais Webber, Rodrigo Cataldo, Leticia B. Poehls, César A. M. Marcon:
OcNoC: Efficient One-Cycle Router Implementation for 3D Mesh Network-on-Chip. VLSID 2015: 105-110 - 2014
- [j5]Edson I. Moreno, Thais Webber, César A. M. Marcon, Fernando Gehm Moraes, Ney Laert Vilar Calazans:
MoNoC: A monitored network on chip with path adaptation mechanism. J. Syst. Archit. 60(10): 783-795 (2014) - [c40]Rodrigo Cataldo, Ramon Fernandes, Fernando Grando, Thais Webber, Ana Benso, César A. M. Marcon:
The impact of routing arbitration mechanisms on 3D NoC latency. ICECS 2014: 890-894 - [c39]Edson I. Moreno, Thais Webber, César A. M. Marcon, Fernando Moraes, Ney Calazans:
A monitored NoC with runtime path adaptation. ISCAS 2014: 1965-1968 - [c38]Jarbas Silveira, Paulo César Cortez, Giovanni Cordeiro Barroso, César A. M. Marcon:
Employing a Timed Colored Petri Net to accomplish an accurate model for Network-on-Chip performance evaluation. ISQED 2014: 55-59 - [c37]César A. M. Marcon, Ramon Fernandes, Rodrigo Cataldo, Fernando Grando, Thais Webber, Ana Benso, Leticia B. Poehls:
Tiny NoC: A 3D Mesh Topology with Router Channel Optimization for Area and Latency Minimization. VLSID 2014: 228-233 - [c36]César A. M. Marcon, Thais Webber, Leticia B. Poehls, Igor K. Pinotti:
Pre-mapping Algorithm for Heterogeneous MPSoCs. VLSID 2014: 252-257 - 2013
- [c35]César A. M. Marcon, Alexandre M. Amory, Thais Webber, Thomas Volpato, Leticia B. Poehls:
Phoenix NoC: A distributed fault tolerant architecture. ICCD 2013: 7-12 - [c34]César A. M. Marcon, Alexandre M. Amory, Felipe T. Bortolon, Thais Webber, Thomas Volpato, Jader Munareto:
An implementation of a distributed fault-tolerant mechanism for 2D mesh NoCs. RSP 2013: 24-29 - [c33]Vinicius Bohrer, Ramon Fernandes, César A. M. Marcon, Thais Webber, Leticia B. Poehls, Ricardo M. Czekster, Fabiano Hessel:
A flexible framework for modeling and simulation of multipurpose wireless networks. RSP 2013: 94-100 - [c32]Yan Ghidini, Matheus T. Moreira, Lucas Brahm, Thais Webber, Ney Calazans, César A. M. Marcon:
Lasio 3D NoC vertical links serialization: Evaluation of latency and buffer occupancy. SBCCI 2013: 1-6 - 2012
- [c31]Eduardo Antunes, Matheus Soares, Alexandra Aguiar, Sergio Johann Filho, Marcos Sartori, Fabiano Hessel, César A. M. Marcon:
Partitioning and dynamic mapping evaluation for energy consumption minimization on NoC-based MPSoC. ISQED 2012: 451-457 - [c30]Yan Ghidini, Thais Webber, Edson I. Moreno, Fernando Grando, Rubem Dutra Ribeiro Fagundes, César A. M. Marcon:
Buffer depth and traffic influence on 3D NoCs performance. RSP 2012: 9-15 - [c29]Yan Ghidini, Thais Webber, Edson I. Moreno, Ivan Quadros, Rubem Dutra Ribeiro Fagundes, César A. M. Marcon:
Topological impact on latency and throughput: 2D versus 3D NoC comparison. SBCCI 2012: 1-6 - [c28]Giuliano B. M. Guarese, Felipe G. Sieben, Thais Webber, Marcos R. Dillenburg, César A. M. Marcon:
Exploiting Modbus Protocol in Wired and Wireless Multilevel Communication Architecture. SBESC 2012: 13-18 - [c27]Igor K. Pinotti, Thais Webber, Natanael Ribeiro, Carlos N. Fraga, Rubem Dutra Ribeiro Fagundes, César A. M. Marcon:
Partitioning Algorithms Analysis for Heterogeneous NoC Based MPSoC. SBESC 2012: 178-183 - [c26]Fauzi de M. Shubeita, Leonardo A. Amaral, César A. M. Marcon, Antonio Rodrigo Delepiane de Vit:
WSN Experiment and a Grid-Based Network Architecture Proposal. SBESC 2012: 225-228 - 2011
- [j4]César A. M. Marcon, Ney Calazans, Edson I. Moreno, Fernando Moraes, Fabiano Hessel, Altamiro Amadeu Susin:
CAFES: A framework for intrachip application modeling and communication architecture design. J. Parallel Distributed Comput. 71(5): 714-728 (2011) - [c25]Alexandre M. Amory, Luciano Ost, César A. M. Marcon, Fernando Gehm Moraes, Marcelo Lubaszewski:
Evaluating energy consumption of homogeneous MPSoCs using spare tiles. DATE 2011: 1164-1167 - [c24]Eduardo Antunes, Alexandra Aguiar, Sergio Johann Filho, Marcos Sartori, Fabiano Hessel, César A. M. Marcon:
Partitioning and mapping on NoC-Based MPSoC: an energy consumption saving approach. NoCArc@MICRO 2011: 51-56 - [c23]Alexandre M. Amory, César A. M. Marcon, Fernando Gehm Moraes, Marcelo Lubaszewski:
Task mapping on NoC-based MPSoCs with faulty tiles: Evaluating the energy consumption and the application execution time. International Symposium on Rapid System Prototyping 2011: 164-170 - [c22]Edson I. Moreno, César A. M. Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes:
Arbitration and routing impact on NoC design. International Symposium on Rapid System Prototyping 2011: 193-198
2000 – 2009
- 2009
- [c21]Ewerson Carvalho, César A. M. Marcon, Ney Calazans, Fernando Moraes:
Evaluation of static and dynamic task mapping algorithms in NoC-based MPSoCs. SoC 2009: 87-90 - 2008
- [j3]César Augusto Missio Marcon, Edson Ifarraguirre Moreno, Ney Laert Vilar Calazans, Fernando Gehm Moraes:
Comparison of network-on-chip mapping algorithms targeting low energy consumption. IET Comput. Digit. Tech. 2(6): 471-482 (2008) - [c20]José Carlos S. Palma, César A. M. Marcon, Fabiano Hessel, Eduardo A. Bezerra, Guilherme Rohde, Luciano Azevedo, Carlos Eduardo Reif, Carolina Metzler:
A Passive 915 MHz UHF RFID Tag. ISQED 2008: 348-351 - [c19]David Matschulat, César A. M. Marcon, Fabiano Hessel:
A QoS Scheduler for Real-Time Embedded Systems. ISQED 2008: 564-567 - [c18]Sergio Johann Filho, Alexandra Aguiar, César Augusto Missio Marcon, Fabiano Hessel:
High-Level Estimation of Execution Time and Energy Consumption for Fast Homogeneous MPSoCs Prototyping. IEEE International Workshop on Rapid System Prototyping 2008: 27-33 - 2007
- [c17]César A. M. Marcon, Edson I. Moreno, Ney Laert Vilar Calazans, Fernando Gehm Moraes:
Evaluation of Algorithms for Low Energy Mapping onto NoCs. ISCAS 2007: 389-392 - [c16]Fabiano Hessel, César A. M. Marcon, Tatiana Gadelha Serra dos Santos:
High Level RTOS Scheduler Modeling for a Fast Design Validation. ISVLSI 2007: 461-466 - [c15]David Matschulat, César A. M. Marcon, Fabiano Hessel:
ER-EDF: A QoS Scheduler for Real-Time Embedded Systems. IEEE International Workshop on Rapid System Prototyping 2007: 181-188 - [c14]César A. M. Marcon, José Carlos S. Palma, Fabiano Hessel, Eduardo A. Bezerra, Guilherme Rohde, Carlos Eduardo Reif, Luciano Azevedo, Carolina Metzler:
A 915 MHz UHF low power RFID tag. SBCCI 2007: 276-281 - [c13]César A. M. Marcon, Sergio Johann Filho, Fabiano Hessel:
A VHDL based approach for fast and accurate energy consumption estimations. VLSI-SoC 2007: 276-279 - [c12]José Carlos S. Palma, César A. M. Marcon, Fabiano Hessel, Eduardo A. Bezerra, Guilherme Rohde, Luciano Azevedo, Carlos Eduardo Reif, Carolina Metzler:
A Flexible Design Flow for a Low Power RFID Tag. VLSI-SoC 2007: 300-303 - [i1]César A. M. Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Igor M. Reis, Fabiano Hessel:
Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique. CoRR abs/0710.4738 (2007) - 2006
- [j2]Fabiano Hessel, Vitor M. da Rosa, Carlos Eduardo Reif, César A. M. Marcon, Tatiana Gadelha Serra dos Santos:
Scheduling refinement in abstract RTOS models. ACM Trans. Embed. Comput. Syst. 5(2): 342-354 (2006) - [c11]Melissa Vetromille, Luciano Ost, César A. M. Marcon, Carlos Eduardo Reif, Fabiano Hessel:
RTOS Scheduler Implementation in Hardware and Software for Real Time Applications. IEEE International Workshop on Rapid System Prototyping 2006: 163-168 - 2005
- [b1]César Augusto Missio Marcon:
Modelos para o mapeamento de aplicações em infra-estruturas de comunicação intrachip. Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil, 2005 - [c10]César A. M. Marcon, André Borin Suarez, Altamiro Amadeu Susin, Luigi Carro, Flávio Rech Wagner:
Time and energy efficient mapping of embedded applications onto NoCs. ASP-DAC 2005: 33-38 - [c9]César A. M. Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Igor M. Reis, Fabiano Hessel:
Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique. DATE 2005: 502-507 - [c8]Márcio Eduardo Kreutz, César A. M. Marcon, Luigi Carro, Altamiro Amadeu Susin, Ney Laert Vilar Calazans:
Energy and latency evaluation of NoC topologies. ISCAS (6) 2005: 5866-5869 - [c7]César A. M. Marcon, Márcio Eduardo Kreutz, Altamiro Amadeu Susin, Ney Laert Vilar Calazans:
Models for Embedded Application Mapping onto NoCs: Timing Analysis. IEEE International Workshop on Rapid System Prototyping 2005: 17-23 - [c6]Márcio Eduardo Kreutz, César A. M. Marcon, Luigi Carro, Flávio Rech Wagner, Altamiro Amadeu Susin:
Design space exploration comparing homogeneous and heterogeneous network-on-chip architectures. SBCCI 2005: 190-195 - [c5]José Carlos S. Palma, César A. M. Marcon, Fernando Gehm Moraes, Ney Laert Vilar Calazans, Ricardo A. L. Reis, Altamiro Amadeu Susin:
Mapping embedded systems onto NoCs: the traffic effect on dynamic energy estimation. SBCCI 2005: 196-201 - [c4]César A. M. Marcon, José Carlos S. Palma, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Ricardo Augusto da Luz Reis:
Modeling the Traffic Effect for the Application Cores Mapping Problem onto NoCs. VLSI-SoC 2005: 179-194 - 2004
- [c3]Fabiano Hessel, Vitor M. da Rosa, Igor M. Reis, Ricardo Planner, César A. M. Marcon, Altamiro Amadeu Susin:
Abstract RTOS Modeling for Embedded Systems. IEEE International Workshop on Rapid System Prototyping 2004: 210-216 - 2002
- [c2]César A. M. Marcon, Fabiano Hessel, Alexandre M. Amory, Luis H. L. Ries, Fernando Gehm Moraes, Ney Laert Vilar Calazans:
Prototyping of embedded digital systems from SDL language: a case study. HLDVT 2002: 133-138 - [c1]César Augusto Missio Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes:
Requirements, Primitives and Models for Systems Specification. SBCCI 2002: 323-330
1990 – 1999
- 1993
- [j1]Luigi Carro, César A. M. Marcon, Altamiro A. Suzim:
SHC-SLX: A levelized compiled, event driven interpreted VLSI simulator. Microprocess. Microprogramming 38(1-5): 503-509 (1993)
Coauthor Index
Luciano Volcan Agostini
aka: Luciano Agostini
aka: Luciano Agostini
Ney Laert Vilar Calazans
aka: Ney Calazans
aka: Ney Calazans
Rodrigo Cataldo
aka: Rodrigo Cadore Cataldo
aka: Rodrigo Cadore Cataldo
Jarbas Silveira
aka: Jarbas A. N. Silveira
aka: Jarbas A. N. Silveira
Altamiro Amadeu Susin
aka: Altamiro A. Suzim
aka: Altamiro A. Suzim
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