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Adriana C. Sanabria-Borbon
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2020 – today
- 2022
- [j5]Nithyashankari Gummidipoondi Jayasankaran, Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio, Jiang Hu, Jeyavijayan Rajendran:
Towards Provably-Secure Analog and Mixed-Signal Locking Against Overproduction. IEEE Trans. Emerg. Top. Comput. 10(1): 386-403 (2022) - 2021
- [j4]Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio:
Synthesis of High-Order Continuously Tunable Low-Pass Active-R Filters. IEEE Trans. Circuits Syst. I Regul. Pap. 68(5): 1841-1854 (2021) - [j3]Adriana C. Sanabria-Borbon, Nithyashankari Gummidipoondi Jayasankaran, Jiang Hu, Jeyavijayan Rajendran, Edgar Sánchez-Sinencio:
Analog/RF IP Protection: Attack Models, Defense Techniques, and Challenges. IEEE Trans. Circuits Syst. II Express Briefs 68(1): 36-41 (2021) - 2020
- [j2]Nithyashankari Gummidipoondi Jayasankaran, Adriana C. Sanabria-Borbon, Amr Abuellil, Edgar Sánchez-Sinencio, Jiang Hu, Jeyavijayan Rajendran:
Breaking Analog Locking Techniques. IEEE Trans. Very Large Scale Integr. Syst. 28(10): 2157-2170 (2020) - [c8]Adriana C. Sanabria-Borbon, Nithyashankari Gummidipoondi Jayasankaran, S. Y. Lee, Edgar Sánchez-Sinencio, Jiang Hu, Jeyavijayan (JV) Rajendran:
Schmitt Trigger-Based Key Provisioning for Locking Analog/RF Integrated Circuits. ITC 2020: 1-10
2010 – 2019
- 2019
- [c7]Nithyashankari Gummidipoondi Jayasankaran, Adriana C. Sanabria-Borbon, Amr Abuellil, Edgar Sánchez-Sinencio, Jiang Hu, Jeyavijayan Rajendran:
Breaking Analog Locking Techniques via Satisfiability Modulo Theories. ITC 2019: 1-10 - 2018
- [j1]Sanghoon Lee, Congyin Shi, Jiafan Wang, Adriana C. Sanabria-Borbon, Hatem Osman, Jiang Hu, Edgar Sánchez-Sinencio:
A Built-In Self-Test and In Situ Analog Circuit Optimization Platform. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(10): 3445-3458 (2018) - [c6]Nithyashankari Gummidipoondi Jayasankaran, Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio, Jiang Hu, Jeyavijayan Rajendran:
Towards provably-secure analog and mixed-signal locking against overproduction. ICCAD 2018: 7 - [c5]Sergio Soto Aguilar, Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio:
Surrogate-based Optimization-aided Design for Low Power Analog Circuits. MWSCAS 2018: 566-569 - [i1]Nithyashankari Gummidipoondi Jayasankaran, Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio, Jiang Hu, Jeyavijayan Rajendran:
Towards Provably-Secure Analog and Mixed-Signal Locking Against Overproduction. IACR Cryptol. ePrint Arch. 2018: 1064 (2018) - 2017
- [c4]Jiafan Wang, Congyin Shi, Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio, Jiang Hu:
Thwarting analog IC piracy via combinational locking. ITC 2017: 1-10 - [c3]Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio:
Efficient use of gain-bandwidth product in active filters: Gm-C and Active-R alternatives. LASCAS 2017: 1-4 - 2014
- [c2]Adriana Carolina Sanabria-Borbon, Esteban Tlelo-Cuautle:
Sizing analog integrated circuits by combining gm/ID technique and evolutionary algorithms. MWSCAS 2014: 234-237 - 2013
- [c1]Adriana C. Sanabria-Borbon, Esteban Tlelo-Cuautle:
Symbolic sensitivity analysis in the sizing of analog integrated circuits. CCE 2013: 440-444
Coauthor Index
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