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2020 – today
- 2022
[c7]Ukjin Kwon, Hsin-Ho Huang, Domitilla Del Vecchio:
Design of a long-term memory genetic toggle switch inspired by chromatin modification circuits. CDC 2022: 3200-3206
2010 – 2019
- 2018
- [j2]Hsin-Ho Huang
, Huimei Cheng, Chris Chu, Peter A. Beerel:
Area Optimization of Timing Resilient Designs Using Resynthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(6): 1197-1210 (2018) - 2017
- [j1]Arash Saifhashemi, Hsin-Ho Huang, Peter A. Beerel:
Reconditioning: A Framework for Automatic Power Optimization of QDI Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(2): 265-278 (2017) - 2016
- [c6]Hsin-Ho Huang, Huimei Cheng, Chris C. N. Chu, Peter A. Beerel:
Area optimization of resilient designs guided by a mixed integer geometric program. DAC 2016: 130:1-130:6 - 2015
- [c5]Dylan Hand, Matheus Trevisan Moreira, Hsin-Ho Huang, Danlei Chen, Frederico Butzke, Zhichao Li, Matheus Gibiluka, Melvin A. Breuer, Ney Laert Vilar Calazans, Peter A. Beerel:
Blade - A Timing Violation Resilient Asynchronous Template. ASYNC 2015: 21-28 - [c4]Dylan Hand, Hsin-Ho Huang, Benmao Cheng, Yang Zhang, Matheus Trevisan Moreira, Melvin A. Breuer, Ney Laert Vilar Calazans, Peter A. Beerel:
Performance Optimization and Analysis of Blade Designs under Delay Variability. ASYNC 2015: 61-68 - [c3]Arash Saifhashemi, Hsin-Ho Huang, Priyanka Bhalerao, Peter A. Beerel:
Logical equivalence checking of asynchronous circuits using commercial tools. DATE 2015: 1563-1566 - 2014
- [c2]Arash Saifhashemi, Hsin-Ho Huang, Peter A. Beerel:
Reconditioning: Automatic Power Optimization of QDI Circuits. ASYNC 2014: 77-84 - [c1]Gang Wu, Tao Lin, Hsin-Ho Huang, Chris Chu, Peter A. Beerel:
Asynchronous circuit placement by lagrangian relaxation. ICCAD 2014: 641-646
Coauthor Index
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