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Mao-Ruei Li

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affiliation: National Tsing Hua University, Hsinchu City, Taiwan

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2020 – today

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2021
[j6]
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Wei-Xiang Chu, Ting-An Hu, Huang-Chang Lee, Mao-Ruei Li, Yeong-Luh Ueng:
An Efficient Short High-Order Non-Binary LDPC Decoder Architecture Using a Message-Adaptation EMS Algorithm. IEEE Access 9: 161520-161532 (2021)

2010 – 2019

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2019
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Mao-Ruei Li, Wei-Xiang Chu, Huang-Chang Lee, Yeong-Luh Ueng:
An Efficient High-Rate Non-Binary LDPC Decoder Architecture With Early Termination. IEEE Access 7: 20302-20315 (2019)
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Cing-Yi Liang, Mao-Ruei Li, Huang-Chang Lee, Hsin-Yu Lee, Yeong-Luh Ueng:
Hardware-friendly LDPC Decoding Scheduling for 5G HARQ Applications. ICASSP 2019: 1418-1422
2018
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Li-Chung Lee, Wei-Min Lai, Mao-Ruei Li, Yeong-Luh Ueng:
A Shuffled-Based Iterative Demodulation and Decoding Scheme for Ldpc Coded Flash Memory. ICASSP 2018: 1110-1114
2017
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Mao-Ruei Li, Chia-Hsiang Yang, Yeong-Luh Ueng:
A 5.28-Gb/s LDPC Decoder With Time-Domain Signal Processing for IEEE 802.15.3c Applications. IEEE J. Solid State Circuits 52(2): 592-604 (2017)
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Huang-Chang Lee, Mao-Ruei Li, Jyun-Kai Hu, Po-Chiao Chou, Yeong-Luh Ueng:
Optimization Techniques for the Efficient Implementation of High-Rate Layered QC-LDPC Decoders. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(2): 457-470 (2017)
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Yeong-Luh Ueng, Chun-Yi Wang, Mao-Ruei Li:
An Efficient Combined Bit-Flipping and Stochastic LDPC Decoder Using Improved Probability Tracers. IEEE Trans. Signal Process. 65(20): 5368-5380 (2017)
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Mao-Ruei Li, Li-Min Jhuang, Yeong-Luh Ueng:
A modified gradient descent bit flipping decoding scheme for LDPC codes. SiPS 2017: 1-6
2016
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Mao-Ruei Li, Ting-Yu Kuan, Huang-Chang Lee, Yeong-Luh Ueng:
An IDD receiver of LDPC coded modulation scheme for flash memory applications. APCCAS 2016: 289-292
2014
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Chia-Hsiang Yang, Ting-Ying Huang, Mao-Ruei Li, Yeong-Luh Ueng:
A 5.4 µW Soft-Decision BCH Decoder for Wireless Body Area Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(9): 2721-2729 (2014)
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Mao-Ruei Li, Hsueh-Chih Chou, Yeong-Luh Ueng, Yun Chen:
A low-complexity LDPC decoder for NAND flash applications. ISCAS 2014: 213-216

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