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Giannis Petrousov
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2010 – 2019
- 2017
- [c7]Ioannis Petrousov, Minas Dasygenis:
Realization of a hardware generator for the sum of absolute difference component. MOCAST 2017: 1-4 - [c6]Ioannis Petrousov, Minas Dasygenis:
Automating the generation of hardware accelerators from custom arithmetic functions. PCI 2017: 14:1-14:5 - 2015
- [c5]Minas Dasygenis, Ioannis Petrousov:
A generic moduli selection algorithm for the Residue Number System. DTIS 2015: 1-2 - [c4]Minas Dasygenis, Ioannis Petrousov:
A networking EDA tool for multi-vector multiplication IP circuits. DTIS 2015: 1-2 - [c3]Ioannis Petrousov, Minas Dasygenis:
A CAD tool for custom magnitude comparators. Panhellenic Conference on Informatics 2015: 413-418 - 2014
- [c2]Giannis Petrousov, Minas Dasygenis:
A unique network EDA tool to create optimized ad hoc binary to residue number system converters. PATMOS 2014: 1-8 - [c1]Giannis Petrousov, Minas Dasygenis:
Designing optimized forward residue number systems IP blocks converters from a network interface. Panhellenic Conference on Informatics 2014: 32:1-32:6
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last updated on 2023-09-27 22:50 CEST by the dblp team
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