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Gnanasekaran Dhanabalan

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2023
[j3]
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  - https://dblp.org/rec/journals/wpc/DhanabalanS23
Gnanasekaran Dhanabalan, S. Tamil Selvi:
Software Design of VerilogHDL Code Generation for Ladder Diagram and Data Acquisition Using LABVIEW. Wirel. Pers. Commun. 128(2): 1087-1115 (2023)
2022
[j2]
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  - journals/sensors/DhanabalanSM22
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Gnanasekaran Dhanabalan, Sankar Tamil Selvi, Miroslav Mahdal:
Scan Time Reduction of PLCs by Dedicated Parallel-Execution Multiple PID Controllers Using an FPGA. Sensors 22(12): 4584 (2022)
2015
[j1]
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  - journals/csi/DhanabalanS15
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Gnanasekaran Dhanabalan, Sankar Tamil Selvi:
Design of parallel conversion multichannel analog to digital converter for scan time reduction of programmable logic controller using FPGA. Comput. Stand. Interfaces 39: 12-21 (2015)

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