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Hsing-Ping Fu

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2010 – 2019

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2015
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  - journals/tvlsi/ChungWFLCL15
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  - https://dblp.org/rec/journals/tvlsi/ChungWFLCL15
Szu-Chi Chung, Jing-Yu Wu, Hsing-Ping Fu, Jen-Wei Lee, Hsie-Chia Chang, Chen-Yi Lee:
Efficient Hardware Architecture of η_T Pairing Accelerator Over Characteristic Three. IEEE Trans. Very Large Scale Integr. Syst. 23(1): 88-97 (2015)
2012
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Hsing-Ping Fu, Ju-Hung Hsiao, Po-Chun Liu, Hsie-Chia Chang, Chen-Yi Lee:
A low cost DPA-resistant 8-bit AES core based on ring oscillators. VLSI-DAT 2012: 1-4

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