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Vijay K. Raj

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Books and Theses

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1985
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Vijay K. Raj:
Translating Data Flow Graphs to Architectures. University of Illinois Urbana-Champaign, USA, 1985

Journal Articles

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1995
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Choong Gun Oh, Hee Yong Youn, Vijay K. Raj:
An Efficient Algorithm-Based Concurrent Error Detection for FFT Networks. IEEE Trans. Computers 44(9): 1157-1162 (1995)

Conference and Workshop Papers

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1994
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M. Vashi, Vijay K. Raj, Hee Yong Youn:
A distributed controller for system level integration. Great Lakes Symposium on VLSI 1994: 2-5
1993
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S. Aranake, Vijay K. Raj, M. Vashi, Hee Yong Youn:
Optimal register allocation in high level synthesis. Great Lakes Symposium on VLSI 1993: 71-75
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Choong Gun Oh, Hee Yong Youn, Vijay K. Raj:
Algorithm-Based Concurrent Error Detection for FFT Networks. VLSI Design 1993: 144-147
1989
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Vijay K. Raj:
DAGAR: an automatic pipelined microarchitecture synthesis system. ICCD 1989: 428-431
1984
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Vijay K. Raj, Barry M. Pangrle, Daniel D. Gajski:
Microprocessor synthesis. DAC 1984: 676-678

Coauthor Index

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