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Chao-Chieh Wu

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2010 – 2019

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2017
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  - conf/vlsi-dat/HsuWHHLCL17
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  - https://dblp.org/rec/conf/vlsi-dat/HsuWHHLCL17
Ting-Shuo Hsu, Chao-Chieh Wu, Che-Wei Hsu, Chih-Tsun Huang, Jing-Jia Liou, Yao-Hua Chen, Juin-Ming Lu:
Design space exploration with a cycle-accurate systemC/TLM DRAM controller model. VLSI-DAT 2017: 1-4
2015
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Hsiao-Wei Chien, Jyun-Long Lai, Chao-Chieh Wu, Chih-Tsun Huang, Ting-Shuo Hsu, Jing-Jia Liou:
Design of a scalable many-core processor for embedded applications. ASP-DAC 2015: 24-25

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