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T. Vigneswaran
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2020 – today
- 2020
- [j10]Abraham Sudharson Ponraj
, T. Vigneswaran:
Daily evapotranspiration prediction using gradient boost regression model for irrigation planning. J. Supercomput. 76(8): 5732-5744 (2020)
2010 – 2019
- 2019
- [j9]S. Nirmalraj
, T. Vigneswaran:
Analog to information convertor using cascaded transform and Gaussian random matrix. Clust. Comput. 22(5): 11813-11820 (2019) - [j8]P. Radhika
, T. Vigneswaran, J. Selvakumar:
Design of high performance filter bank multi-carrier transmitter. Clust. Comput. 22(5): 12521-12527 (2019) - [j7]V. Sarada
, T. Vigneswaran, J. Selvakumar:
Low-power and high-throughput 128-point feedforward FFT processor. Clust. Comput. 22(6): 13397-13404 (2019) - [j6]S. Umadevi, T. Vigneswaran:
Reliability improved, high performance FIR filter design using new computation sharing multiplier: suitable for signal processing applications. Clust. Comput. 22(6): 13669-13681 (2019) - [j5]A. Maria Jossy
, T. Vigneswaran, S. Malarvizhi, K. K. Nagarajan:
Characterization and modeling of dual material double gate tunnel field effect transistor using superposition approximation method. Concurr. Comput. Pract. Exp. 31(14) (2019) - [j4]S. Beulah Hemalatha, T. Vigneswaran:
Reconfigurable communication wrapper for QoS demand for network on chip. Int. J. Adv. Intell. Paradigms 12(1/2): 24-32 (2019) - [j3]M. Jasmin, T. Vigneswaran:
An adaptive low power coding scheme for the NoC. Int. J. Adv. Intell. Paradigms 13(3/4): 324-333 (2019) - 2018
- [j2]E. Chitra
, T. Vigneswaran
, S. Malarvizhi:
Analysis and Implementation of High Performance Reconfigurable Finite Impulse Response Filter Using Distributed Arithmetic. Wirel. Pers. Commun. 102(4): 3413-3425 (2018) - 2014
- [j1]Amita Nandal, T. Vigneswaran, Ashwani K. Rana
:
DA-Based Efficient Testable FIR Filter Implementation on FPGA Using Reversible Logic. Circuits Syst. Signal Process. 33(3): 863-884 (2014)
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