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2020 – today
- 2024
[j9]Shanshan Wang, Chenglong Xiao, Emmanuel Casseau:
Algorithms with improved delay for enumerating connected induced subgraphs of a large cardinality. Inf. Process. Lett. 183: 106425 (2024)- [j8]Shanshan Wang
, Chenglong Xiao:
Reinforcement Learning for Selecting Custom Instructions Under Area Constraint. IEEE Trans. Artif. Intell. 5(4): 1882-1894 (2024) - [c6]Shuili Zhang, Hongzhang Mu, Quangang Li, Chenglong Xiao, Tingwen Liu:
Fine-Grained Features Alignment and Fusion for Text-Video Cross-Modal Retrieval. ICASSP 2024: 3325-3329 - [i3]Chenglong Xiao, Chengyong Mao, Shanshan Wang:
An algorithm with a delay of O(kΔ) for enumerating connected induced subgraphs of size k. CoRR abs/2404.12559 (2024) - 2021
- [j7]Chenglong Xiao, Shanshan Wang, Wanjun Liu, Xinlin Wang, Emmanuel Casseau:
An Optimal Algorithm for Enumerating Connected Convex Subgraphs in Acyclic Digraphs. IEEE Trans. Circuits Syst. II Express Briefs 68(1): 261-265 (2021) - [i2]Shanshan Wang, Chenglong Xiao:
Algorithms for enumerating connected induced subgraphs of a given order. CoRR abs/2112.07197 (2021) - [i1]Shanshan Wang, Chenglong Xiao, Emmanuel Casseau:
An algorithm with improved delay for enumerating connected induced subgraphs of a large cardinality. CoRR abs/2112.07204 (2021)
2010 – 2019
- 2019
- [j6]Shanshan Wang, Chenglong Xiao, Wanjun Liu:
Parallel Enumeration of Custom Instructions Based on Multidepth Graph Partitioning. IEEE Embed. Syst. Lett. 11(1): 1-4 (2019) - 2017
- [j5]Shanshan Wang, Chenglong Xiao, Wanjun Liu:
A Faster Algorithm for Enumerating Connected Convex Subgraphs in Acyclic Digraphs. IEEE Embed. Syst. Lett. 9(1): 9-12 (2017) - [j4]Chenglong Xiao, Shanshan Wang, Wanjun Liu, Emmanuel Casseau:
Parallel custom instruction identification for extensible processors. J. Syst. Archit. 76: 149-159 (2017) - 2016
- [j3]Shanshan Wang, Chenglong Xiao, Wanjun Liu, Emmanuel Casseau:
A comparison of heuristic algorithms for custom instruction selection. Microprocess. Microsystems 45: 176-186 (2016) - 2015
- [c5]Shanshan Wang, Chenglong Xiao, Wanjun Liu, Emmanuel Casseau, Xiao Yang:
Selecting most profitable instruction-set extensions using ant colony heuristic. DASIP 2015: 1-7 - 2014
- [j2]Chenglong Xiao, Emmanuel Casseau, Shanshan Wang, Wanjun Liu:
Automatic custom instruction identification for application-specific instruction set processors. Microprocess. Microsystems 38(8): 1012-1024 (2014) - [c4]Chenglong Xiao, Emmanuel Casseau:
Improving high-level synthesis effectiveness through custom operator identification. ISCAS 2014: 161-164 - 2012
- [j1]Chenglong Xiao, Emmanuel Casseau:
Exact custom instruction enumeration for extensible processors. Integr. 45(3): 263-270 (2012) - 2011
- [c3]Chenglong Xiao, Emmanuel Casseau:
Efficient custom instruction enumeration for extensible processors. ASAP 2011: 211-214 - [c2]Chenglong Xiao, Emmanuel Casseau:
Efficient maximal convex custom instruction enumeration for extensible processors. DASIP 2011: 137-143 - [c1]Chenglong Xiao, Emmanuel Casseau:
An efficient algorithm for custom instruction enumeration. ACM Great Lakes Symposium on VLSI 2011: 187-192
Coauthor Index
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