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Furkan Ercan
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2020 – today
- 2023
- [c24]Arslan Riaz, Amit Solomon, Furkan Ercan, Muriel Médard, Rabia Tugce Yazicigil
, Ken R. Duffy
:
Noise Recycling using GRAND for Improving the Decoding Performance. COMSNETS 2023: 171-173 - [c23]Furkan Ercan, Kevin Galligan, David Starobinski, Muriel Médard, Ken R. Duffy
, Rabia Tugce Yazicigil:
GRAND-EDGE: A Universal, Jamming-Resilient Algorithm with Error-and-Erasure Decoding. ICC 2023: 4501-4507 - [c22]Arslan Riaz, Alperen Yasar, Furkan Ercan, Wei An, Jonathan Ngo, Kevin Galligan, Muriel Médard, Ken R. Duffy
, Rabia Tugce Yazicigl:
A Sub-0.8pJ/b 16.3Gbps/mm2 Universal Soft-Detection Decoder Using ORBGRAND in 40nm CMOS. ISSCC 2023: 432-433 - [c21]Arslan Riaz, Zeynep Ece Kizilates, Alperen Yasar, Furkan Ercan, Wei An, Kevin Galligan, Muriel Médard, Ken R. Duffy
, Rabia Tugce Yazicigil:
Demo: Universal Soft-Detection Decoder with Ultra-Low Energy Consumption Using ORBGRAND. WoWMoM 2023: 337-339 - [c20]Enes Alp, Furkan Ercan
, Bernd Kuhlenkötter
, Michael Herzog:
Modeling and Simulation for the Operative Service Delivery Planning in the Context of Product-Service Systems. WSC 2023: 1936-1947 - [i14]Furkan Ercan, Kevin Galligan, David Starobinski, Muriel Médard, Ken R. Duffy
, Rabia Tugce Yazicigil:
GRAND-EDGE: A Universal, Jamming-resilient Algorithm with Error-and-Erasure Decoding. CoRR abs/2301.09778 (2023) - 2022
- [j8]Syed Mohsin Abbas
, Thibaud Tonnellier
, Furkan Ercan
, Marwan Jalaleddine
, Warren J. Gross
:
High-Throughput and Energy-Efficient VLSI Architecture for Ordered Reliability Bits GRAND. IEEE Trans. Very Large Scale Integr. Syst. 30(6): 681-693 (2022) - [c19]Furkan Ercan, Kevin Galligan, Ken R. Duffy
, Muriel Médard, David Starobinski, Rabia Tugce Yazicigil
:
A General Security Approach for Soft-information Decoding against Smart Bursty Jammers. GLOBECOM (Workshops) 2022: 245-251 - [c18]Arslan Riaz, Amit Solomon, Furkan Ercan, Muriel Médard, Rabia Tugce Yazicigil
, Ken R. Duffy
:
Interleaved Noise Recycling using GRAND. ICC 2022: 2483-2488 - [i13]Furkan Ercan, Kevin Galligan, Ken R. Duffy
, Muriel Médard, David Starobinski, Rabia Tugce Yazicigil:
A General Security Approach for Soft-information Decoding against Smart Bursty Jammers. CoRR abs/2210.04061 (2022) - 2021
- [j7]Nghia Doan
, Seyyed Ali Hashemi, Furkan Ercan, Thibaud Tonnellier, Warren J. Gross:
Neural Successive Cancellation Flip Decoding of Polar Codes. J. Signal Process. Syst. 93(6): 631-642 (2021) - [c17]Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Marwan Jalaleddine
, Warren J. Gross:
High-Throughput VLSI Architecture for Soft-Decision Decoding with ORBGRAND. ICASSP 2021: 8288-8292 - [c16]Nghia Doan, Seyyed Ali Hashemi, Furkan Ercan, Warren J. Gross:
Fast SC-Flip Decoding of Polar Codes with Reinforcement Learning. ICC 2021: 1-6 - [c15]Renee Lerch, Babak Hosseini, Pierre Gembaczka, Gernot A. Fink, André Lüdecke
, Viktor Brack, Furkan Ercan
, Alexander Utz
, Karsten Seidl:
Design of an Artificial Neural Network Circuit for detecting Atrial Fibrillation in ECG Signals. IEEE SENSORS 2021: 1-4 - [i12]Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Marwan Jalaleddine, Warren J. Gross:
High-Throughput VLSI architecture for Soft-Decision decoding with ORBGRAND. CoRR abs/2105.07115 (2021) - [i11]Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Marwan Jalaleddine, Warren J. Gross:
High-Throughput and Energy-Efficient VLSI Architecture for Ordered Reliability Bits GRAND. CoRR abs/2110.13776 (2021) - 2020
- [j6]Furkan Ercan
, Thibaud Tonnellier
, Warren J. Gross
:
Energy-Efficient Hardware Architectures for Fast Polar Decoders. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(1): 322-335 (2020) - [j5]Furkan Ercan
, Thibaud Tonnellier
, Nghia Doan, Warren J. Gross
:
Practical Dynamic SC-Flip Polar Decoders: Algorithm and Implementation. IEEE Trans. Signal Process. 68: 5441-5456 (2020) - [c14]Furkan Ercan, Thibaud Tonnellier, Nghia Doan, Warren J. Gross:
Simplified Dynamic SC-Flip Polar Decoding. ICASSP 2020: 1733-1737 - [c13]Furkan Ercan, Warren J. Gross:
Fast Thresholded SC-Flip Decoding of Polar Codes. ICC 2020: 1-7 - [c12]Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Warren J. Gross:
High-Throughput VLSI Architecture for GRAND. SiPS 2020: 1-6 - [i10]Furkan Ercan, Thibaud Tonnellier, Carlo Condo, Warren J. Gross:
Operation Merging for Hardware Implementations of Fast Polar Decoders. CoRR abs/2006.02012 (2020) - [i9]Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Warren J. Gross:
High-Throughput VLSI Architecture for GRAND. CoRR abs/2007.07328 (2020) - [i8]Furkan Ercan, Warren J. Gross:
Fast Thresholded SC-Flip Decoding of Polar Codes. CoRR abs/2007.15647 (2020) - [i7]Furkan Ercan, Thibaud Tonnellier, Nghia Doan, Warren J. Gross:
Practical Dynamic SC-Flip Polar Decoders: Algorithm and Implementation. CoRR abs/2009.08547 (2020)
2010 – 2019
- 2019
- [j4]Carlo Condo
, Seyyed Ali Hashemi
, Arash Ardakani
, Furkan Ercan
, Warren J. Gross
:
Design and Implementation of a Polar Codes Blind Detection Scheme. IEEE Trans. Circuits Syst. II Express Briefs 66-II(6): 943-947 (2019) - [j3]Furkan Ercan
, Carlo Condo
, Warren J. Gross:
Improved Bit-Flipping Algorithm for Successive Cancellation Decoding of Polar Codes. IEEE Trans. Commun. 67(1): 61-72 (2019) - [j2]Furkan Ercan
, Thibaud Tonnellier
, Carlo Condo, Warren J. Gross:
Operation Merging for Hardware Implementations of Fast Polar Decoders. J. Signal Process. Syst. 91(9): 995-1007 (2019) - [c11]Lukas Straczek, Furkan Ercan
, Jürgen Oehm:
A Novel Offset and 1/f Noise Compensated Single-Slope ADC with Reduced Hardware Effort. NEWCAS 2019: 1-4 - [c10]Nghia Doan, Seyyed Ali Hashemi
, Furkan Ercan, Thibaud Tonnellier, Warren J. Gross:
Neural Dynamic Successive Cancellation Flip Decoding of Polar Codes. SiPS 2019: 272-277 - [i6]Nghia Doan, Seyyed Ali Hashemi, Furkan Ercan, Thibaud Tonnellier, Warren J. Gross:
Neural Dynamic Successive Cancellation Flip Decoding of Polar Codes. CoRR abs/1907.11563 (2019) - 2018
- [c9]Furkan Ercan
, Carlo Condo, Seyyed Ali Hashemi
, Warren J. Gross:
Partitioned Successive-Cancellation Flip Decoding of Polar Codes. ICC 2018: 1-6 - [c8]Carlo Condo, Furkan Ercan
, Warren J. Gross:
Improved successive cancellation flip decoding of polar codes based on error distribution. WCNC Workshops 2018: 19-24 - [i5]Carlo Condo, Seyyed Ali Hashemi, Arash Ardakani, Furkan Ercan, Warren J. Gross:
Design and Implementation of a Polar Codes Blind Detection Scheme. CoRR abs/1801.01820 (2018) - [i4]Furkan Ercan, Carlo Condo, Warren J. Gross:
Improved Bit-Flipping Algorithm for Successive Cancellation Decoding of Polar Codes. CoRR abs/1808.03616 (2018) - 2017
- [j1]Seyyed Ali Hashemi
, Carlo Condo
, Furkan Ercan
, Warren J. Gross:
Memory-Efficient Polar Decoders. IEEE J. Emerg. Sel. Topics Circuits Syst. 7(4): 604-615 (2017) - [c7]Seyyed Ali Hashemi
, Carlo Condo, Furkan Ercan
, Warren J. Gross:
On the performance of polar codes for 5G eMBB control channel. ACSSC 2017: 1764-1768 - [c6]Furkan Ercan
, Carlo Condo, Seyyed Ali Hashemi
, Warren J. Gross:
On error-correction performance and implementation of polar code list decoders for 5G. Allerton 2017: 443-449 - [c5]Furkan Ercan
, Carlo Condo, Warren J. Gross:
Reduced-memory high-throughput fast-SSC polar code decoder architecture. SiPS 2017: 1-6 - [i3]Furkan Ercan, Carlo Condo, Seyyed Ali Hashemi, Warren J. Gross:
On Error-Correction Performance and Implementation of Polar Code List Decoders for 5G. CoRR abs/1708.04706 (2017) - [i2]Furkan Ercan, Carlo Condo, Seyyed Ali Hashemi, Warren J. Gross:
Partitioned Successive-Cancellation Flip Decoding of Polar Codes. CoRR abs/1711.11093 (2017) - [i1]Carlo Condo, Furkan Ercan, Warren J. Gross:
Improved Successive Cancellation Flip Decoding of Polar Codes Based on Error Distribution. CoRR abs/1711.11096 (2017) - 2015
- [c4]Furkan Ercan
, Ali Muhtaroglu:
Comparative power-delay performance analysis of threshold logic technologies. ICEAC 2015: 1-4 - [c3]Furkan Ercan
, Ali Muhtaroglu:
Power-delay analysis of an ABACUS parallel integer multiplier VLSI implementation. ICEAC 2015: 1-4 - 2013
- [c2]Furkan Ercan
, Ali Muhtaroglu:
Energy-delay performance of capacitive threshold logic (CTL) circuits for threshold detection. ICEAC 2013: 109-114 - 2012
- [c1]Furkan Ercan
, Neven Abou Gazala, Howard David:
An integrated approach to system-level CPU and memory energy efficiency on computing systems. ICEAC 2012: 1-6
Coauthor Index
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last updated on 2024-05-08 21:00 CEST by the dblp team
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