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ORCIDKe Wang 0030
Person information
- affiliation: George Washington University, Department of Electrical and Computer Engineering, Washington, DC, USA
Other persons with the same name
- Ke Wang — disambiguation page
- Ke Wang 0001
![[0000-0002-8021-4951]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png "0000-0002-8021-4951")
— Simon Fraser University, Burnaby, BC, Canada (and 1 more) - Ke Wang 0002 — Harbin Institute of Technology, Department of Mathematics, Weihai, China (and 1 more)
- Ke Wang 0003 — Hong Kong University of Science and Technology, Jockey Club Institute for Advanced Study, Hong Kong (and 2 more)
- Ke Wang 0004 — Shanghai University, School of Management, China (and 1 more)
- Ke Wang 0005 — Beijing University of Technology, College of Electronic and Control Engineering, China (and 2 more)
- Ke Wang 0006 — National University of Singapore, NUS Graduate School for Integrative Sciences and Engineering, Singapore
- Ke Wang 0007 — RMIT University, School of Engineering, Melbourne, Australia (and 1 more)
- Ke Wang 0008 — Chang'an University, School of Highway, Xi'an, China
- Ke Wang 0009 — Columbia University, New York, NY, USA
- Ke Wang 0010 — PLA University of Science and Technology, Department of Satellite Communications, Nanjing, China
- Ke Wang 0011 — University of Virginia, Department of Computer Science, Charlottesville, VA, USA
- Ke Wang 0012 — Intel (and 1 more)
- Ke Wang 0013 — Beijing University of Posts and Telecommunications, School of Information and Communication Engineering / MoE Key Laboratory of Universal Wireless Communications, China
- Ke Wang 0014 — Chinese Academy of Sciences, Institute of Electrical Engineering, Key Laboratory of Power Electronics and Electric Drive, Beijing, China
- Ke Wang 0015 — China Electric Power Research Institute, Electric Automation Department, Nanjing, China
- Ke Wang 0016 — Zhejiang University, Institute of Remote Sensing and Information System Application / College of Environmental and Resource Sciences, Hangzhou, China
- Ke Wang 0017 — Chongqing University, State Key Laboratory of Mechanical Transmission, China
- Ke Wang 0018 — Xian University of Architecture and Technology, School of Management, China
- Ke Wang 0019 — Nanjing University of Aeronautics and Astronautics, School of Electronic and Information Engineering, China
- Ke Wang 0020 — University of Glasgow, School of Engineering, UK
- Ke Wang 0021 — University of North Carolina, Department of Computer Science, Chapel Hill, NC, USA
- Ke Wang 0023 — China University of Geosciences, Wuhan, China (and 1 more)
- Ke Wang 0024 — Chongqing University, College of Computer Science, China
- Ke Wang 0025 — Zhejiang University of Technology, College of Information Engineering, China
- Ke Wang 0026 — Shanghai University, School of Mechatronic Engineering and Automation, China
- Ke Wang 0027 — Shandong University of Science and Technology, College of Geomatics, Qingdao, China
- Ke Wang 0028 — Harbin Institute of Technology, State Key Laboratory of Robotics and System, Harbin, China
- Ke Wang 0029 — Harbin Institute of Technology, Instrument Science and Technology, China
- Ke Wang 0031 — Sichuan University, College of Mathematics, Chengdu, China
- Ke Wang 0032 — Hohai University, State Key Laboratory of Hydrology-Water Resources and Hydraulic Engineering, Nanjing, China
- Ke Wang 0033 — Tsinghua University, Department of Electronic Engineering, Beijing, China
- Ke Wang 0034 — Zhejiang University, Institute of VLSI Design, China
- Ke Wang 0035 — University of California Santa Barbara, Department of Statistics and Applied Probability, CA, USA
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2020 – today
- 2024
[j7]Ke Wang, Hao Zheng, Jiajun Li, Ahmed Louri:
Morph-GCNX: A Universal Architecture for High-Performance and Energy-Efficient Graph Convolutional Network Acceleration. IEEE Trans. Sustain. Comput. 9(2): 115-127 (2024)- 2023
- [j6]Jiajun Li, Ke Wang, Hao Zheng, Ahmed Louri:
GShuttle: Optimizing Memory Access Efficiency for Graph Convolutional Neural Network Accelerators. J. Comput. Sci. Technol. 38(1): 115-127 (2023) - [c8]Jiajun Li, Yuxuan Zhang, Hao Zheng, Ke Wang:
FDMAX: An Elastic Accelerator Architecture for Solving Partial Differential Equations. ISCA 2023: 48:1-48:12 - [c7]Chuanzong Zhu, Shichang Li, Yong Li, Jiajun Li, Gang Li, Ke Wang, Yifeng Shi:
Simulation Study of Ferroresonance on Secondary Side of Main Transformer in a 500kV System. iSPEC 2023: 1-4 - 2022
- [j5]Yuan Li, Ke Wang, Hao Zheng, Ahmed Louri, Avinash Karanth:
Ascend: A Scalable and Energy-Efficient Deep Neural Network Accelerator With Photonic Interconnects. IEEE Trans. Circuits Syst. I Regul. Pap. 69(7): 2730-2741 (2022) - [j4]Jiajun Li, Hao Zheng, Ke Wang, Ahmed Louri:
SGCNAX: A Scalable Graph Convolutional Neural Network Accelerator With Workload Balancing. IEEE Trans. Parallel Distributed Syst. 33(11): 2834-2845 (2022) - [j3]Ke Wang, Hao Zheng, Yuan Li, Ahmed Louri:
SecureNoC: A Learning-Enabled, High-Performance, Energy-Efficient, and Secure On-Chip Communication Framework Design. IEEE Trans. Sustain. Comput. 7(3): 709-723 (2022) - [c6]Ke Wang, Hao Zheng, Yuan Li, Jiajun Li, Ahmed Louri:
AGAPE: Anomaly Detection with Generative Adversarial Network for Improved Performance, Energy, and Security in Manycore Systems. DATE 2022: 849-854 - [c5]Yingnan Zhao, Ke Wang, Ahmed Louri:
FSA: An Efficient Fault-tolerant Systolic Array-based DNN Accelerator Architecture. ICCD 2022: 545-552 - 2021
- [c4]Hao Zheng, Ke Wang, Ahmed Louri:
Adapt-NoC: A Flexible Network-on-Chip Design for Heterogeneous Manycore Architectures. HPCA 2021: 723-735 - 2020
- [j2]Ke Wang, Hao Zheng, Ahmed Louri:
TSA-NoC: Learning-Based Threat Detection and Mitigation for Secure Network-on-Chip Architecture. IEEE Micro 40(5): 56-63 (2020) - [j1]Ke Wang, Ahmed Louri:
CURE: A High-Performance, Low-Power, and Reliable Network-on-Chip Design Using Reinforcement Learning. IEEE Trans. Parallel Distributed Syst. 31(9): 2125-2138 (2020) - [c3]Hao Zheng, Ke Wang, Ahmed Louri:
A Versatile and Flexible Chiplet-based System Design for Heterogeneous Manycore Architectures. DAC 2020: 1-6
2010 – 2019
- 2019
- [c2]Ke Wang, Ahmed Louri, Avinash Karanth, Razvan C. Bunescu:
High-performance, Energy-efficient, Fault-tolerant Network-on-Chip Design Using Reinforcement Learnin. DATE 2019: 1166-1171 - [c1]Ke Wang, Ahmed Louri, Avinash Karanth, Razvan C. Bunescu:
IntelliNoC: a holistic design framework for energy-efficient and reliable on-chip communication for manycores. ISCA 2019: 589-600
Coauthor Index
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last updated on 2024-04-18 20:28 CEST by the dblp team
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