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2020 – today
- 2024
[j3]Kyung-Chan An
, Neelakantan Narasimman, Tony Tae-Hyoung Kim:
A High-Resolution Discrete-Time Second-Order ΣΔ ADC with Improved Tolerance to KT/C Noise Using Low Oversampling Ratio. Sensors 24(17): 5755 (2024)- [j2]Kyung-Chan An, Neelakantan Narasimman, Tony Tae-Hyoung Kim:
A 0.6-to-1.2 V Scaling-Friendly Discrete-Time OTA-Free Linear VCO-Based ΔΣ ADC Suitable for DVFS. IEEE Trans. Circuits Syst. I Regul. Pap. 71(4): 1481-1494 (2024) - 2021
- [j1]Neelakantan Narasimman, Tony Tae-Hyoung Kim:
An Ultra-Low-Voltage VCO-Based ΔΣ Modulator Using Self-compensated Current Reference for Variation Tolerance. Circuits Syst. Signal Process. 40(3): 1089-1110 (2021) - [c5]Kyung-Chan An, Neelakantan Narasimman, Tony Tae-Hyoung Kim:
A 0.6-to-1.2 V Scaling Friendly Discrete-Time OTA-Free ΔΣ-ADC for IoT Applications. ESSCIRC 2021: 219-222 - 2020
- [c4]Neelakantan Narasimman, Raju Salahuddin, Ravinder Pal Singh:
An 86% efficiency Multi-Phase Buck Converter using Time-Domain Compensator and Adaptive Dead-Time Control for DVS Application. IECON 2020: 2255-2260
2010 – 2019
- 2017
- [c3]Neelakantan Narasimman, Dipankar Nag, Kevin Tshun Chuan Chai, Tony T. Kim:
A 1.2 V, 0.84 pJ/conv.-Step ultra-low power capacitance to digital converter for microphone based auscultation. CICC 2017: 1-4 - 2016
- [c2]Neelakantan Narasimman, Tony T. Kim:
A 0.3 V, 49 fJ/conv.-step VCO-based delta sigma modulator with self-compensated current reference for variation tolerance. ESSCIRC 2016: 237-240 - [c1]Neelakantan Narasimman, Tony T. Kim:
An ultra-low voltage, VCO-based ADC with digital background calibration. ISCAS 2016: 1458-1461
Coauthor Index
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