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Thibaut Gurne
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2020 – today
- 2024
- [c4]Laurens Breyne, Christophe Caillaud, Thibaut Gurne, Jean-Francois Paret, Michael Straub, Gertjan Coudyzer, Karim Mekhazni, Michiel Verplaetse:
50G Burst-Mode Receiver Using Monolithic SOA-UTC and Burst-Mode TIA. OFC 2024: 1-3
2010 – 2019
- 2018
- [c3]Jan Cools, Thibaut Gurne, Patrick Reynaert:
A Broadband 13 Vpp 40% PAE Stacked Line Driver in 28 nm Bulk CMOS. ICECS 2018: 445-448 - 2017
- [j1]Guerric de Streel
, François Stas, Thibaut Gurne, François Durant
, Charlotte Frenkel
, Andreia Cathelin, David Bol:
SleepTalker: A ULV 802.15.4a IR-UWB Transmitter SoC in 28-nm FDSOI Achieving 14 pJ/b at 27 Mb/s With Channel Selection Based on Adaptive FBB and Digitally Programmable Pulse Shaping. IEEE J. Solid State Circuits 52(4): 1163-1177 (2017) - [c2]Thibaut Gurne, Maarten Strackx, Maarten Tytgat, Jan Cools, Patrick Reynaert
:
A 20Gbps 1.2GHz full-duplex integrated AFE in 28nm CMOS for copper access. ESSCIRC 2017: 107-110 - 2016
- [c1]Guerric de Streel, François Stas, Thibaut Gurne, François Durant
, Charlotte Frenkel
, David Bol:
SleepTalker: A 28nm FDSOI ULV 802.15.4a IR-UWB transmitter SoC achieving 14pJ/bit at 27Mb/s with adaptive-FBB-based channel selection and programmable pulse shape. VLSI Circuits 2016: 1-2
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last updated on 2024-06-07 19:14 CEST by the dblp team
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