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Journal Articles
- 2017
[j1]Marc Erett
, James Hudner, Declan Carey, Ronan Casey, Kevin Geary, Kay Hearne, Pedro Neto, Thomas Mallard, Vikas Sooden, Mark Smyth, Yohan Frans, Jay Im, Parag Upadhyaya, Wenfeng Zhang, Winson Lin, Bruce Xu, Ken Chang:
A 0.5-16.3 Gbps Multi-Standard Serial Transceiver With 219 mW/Channel in 16-nm FinFET. IEEE J. Solid State Circuits 52(7): 1783-1797 (2017)
Conference and Workshop Papers
- 2019
- [c4]Marc Erett, Declan Carey, Ronan Casey, James Hudner, Kevin Geary, Ted Lee, Mayank Raj, Hongtao Zhang, Arianne Roldan, Hongyuan Zhao, Ping-Chuan Chiang, Haibing Zhao, Nakul Narang, Pedro Neto, Bruce Xu, Winson Lin, Kee Hian Tan, Yohan Frans, Ken Chang:
A 2.25pJ/bit Multi-lane Transceiver for Short Reach Intra-package and Inter-package Communication in 16nm FinFET. CICC 2019: 1-8 - 2018
- [c3]Marc Erett, Declan Carey, James Hudner, Ronan Casey, Kevin Geary, Pedro Neto, Mayank Raj, Scott McLeod, Hongtao Zhang, Arianne Roldan, Hongyuan Zhao, Ping-Chuan Chiang, Haibing Zhao, Kee Hian Tan, Yohan Frans, Ken Chang:
A 126mW 56Gb/s NRZ wireline transceiver for synchronous short-reach applications in 16nm FinFET. ISSCC 2018: 274-276 - [c2]James Hudner, Declan Carey, Ronan Casey, Kay Hearne, Pedro Wilson de Abreu Farias Neto, Ilias Chlis, Marc Erett, Chi Fung Poon, Asma Laraba, Hongtao Zhang, Sai Lalith Chaitanya Ambatipudi, David Mahashin, Parag Upadhyaya, Yohan Frans, Ken Chang:
A 112GB/S PAM4 Wireline Receiver Using a 64-Way Time-Interleaved SAR ADC in 16NM FinFET. VLSI Circuits 2018: 47-48 - 2016
- [c1]Marc Erett, James Hudner, Declan Carey, Ronan Casey, Kevin Geary, Kay Hearne, Pedro Neto, Thomas Mallard, Vikas Sooden, Mark Smyth, Yohan Frans, Jay Im, Parag Upadhyaya, Wenfeng Zhang, Winson Lin, Bruce Xu, Ken Chang:
A 0.5-16.3Gbps multi-standard serial transceiver with 219mW/channel in 16nm FinFET. ESSCIRC 2016: 297-300
Coauthor Index
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