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2020 – today
- 2023
[c4]Bvunarvul Kim, Seungpil Lee, Beomseok Hah, Kanawoo Park, Yongsoon Park, Kangwook Jo, Yujong Noh, Hyeon-Cheon Seol, Hyunsoo Lee, Jae-Hyeon Shin, Seongjin Choi, Youngdon Jung, Sungho Ahn, Yonghun Park, Sujeong Oh, Myungsu Kim, Seonauk Kim, Hyunwook Park, Taeho Lee, Haeun Won, Minsung Kim, Cheulhee Koo, Yeonjoo Choi, Suyoung Choi, Sechun Park, Dongkyu Youn, Junyoun Lim, Wonsun Park, Hwang Hur, Kichang Kwean, Hongsok Choi, Woopyo Jeong, Sungyong Chung, Jungdal Choi, Seonyong Cha:
A High-Performance 1Tb 3b/Cell 3D-NAND Flash with a 194MB/s Write Throughput on over 300 Layers $\mathsf{i}$. ISSCC 2023: 402-403- 2020
- [c3]Hwang Huh, Wanik Cho, Jinhaeng Lee, Yujong Noh, Yongsoon Park, Sunghwa Ok, Jongwoo Kim, Kayoung Cho, Hyunchul Lee, Geonu Kim
, Kangwoo Park, Kwanho Kim, Heejoo Lee, Sooyeol Chai, Chankeun Kwon, Hanna Cho, Chanhui Jeong, Yujin Yang, Jayoon Goo, Jangwon Park, Juhyeong Lee, Heonki Kirr, Kangwook Jo, Cheoljoong Park, Hyeonsu Nam, Hyunseok Song, Sangkyu Lee, Woopyo Jeong, Kun-Ok Ahn, Tae-Sung Jung:
13.2 A 1Tb 4b/Cell 96-Stacked-WL 3D NAND Flash Memory with 30MB/s Program Throughput Using Peripheral Circuit Under Memory Cell Array Technique. ISSCC 2020: 220-221
2010 – 2019
- 2017
- [j1]Kangwook Jo, Hongil Yoon:
Variation-Tolerant Sensing Circuit for Ultralow-Voltage Operation of Spin-Torque Transfer Magnetic RAM. IEEE Trans. Circuits Syst. II Express Briefs 64-II(5): 570-574 (2017) - 2016
- [c2]Kangwook Jo, Kyungseon Cho, Hongil Yoon:
Variation-tolerant and low power look-up table (LUT) using spin-torque transfer magnetic RAM for non-volatile field programmable gate array (FPGA). ISOCC 2016: 101-102 - 2012
- [c1]Jaeseok Park, Ingeol Lee, Young-Seok Park, Sung-Geun Kim, Kyungho Ryu, Dong-Hoon Jung, Kangwook Jo, Choong Keun Lee, Hongil Yoon, Seong-Ook Jung, Woo-Young Choi, Sungho Kang:
Integration of dual channel timing formatter system for high speed memory test equipment. ISOCC 2012: 185-187
Coauthor Index
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