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2020 – today
- 2021
[c17]Jakub Lojda, Richard Panek, Jakub Podivinsky, Ondrej Cekan, Martin Krcma, Zdenek Kotásek:
Testing Embedded Software Through Fault Injection: Case Study on Smart Lock. LATS 2021: 1-6- 2020
- [c16]Jakub Lojda, Jakub Podivinsky, Ondrej Cekan
, Richard Panek, Martin Krcma, Zdenek Kotásek:
Automatic Design of Reliable Systems Based on the Multiple-choice Knapsack Problem. DDECS 2020: 1-4 - [c15]Jakub Lojda, Richard Panek, Jakub Podivinsky, Ondrej Cekan, Martin Krcma, Zdenek Kotásek:
Hardening of Smart Electronic Lock Software against Random and Deliberate Faults. DSD 2020: 680-683 - [c14]Jakub Lojda, Richard Panek, Jakub Podivinsky, Ondrej Cekan, Martin Krcma, Zdenek Kotásek:
Analysis of Software-Implemented Fault Tolerance: Case Study on Smart Lock. EWDTS 2020: 1-5 - [c13]Jakub Podivinsky, Ondrej Cekan, Martin Krcma, Radek Burget, Tomas Hruska, Zdenek Kotásek:
Iterative Algorithm for Multidimensional Pareto Frontiers Intersection Determination. LASCAS 2020: 1-4 - [c12]Jakub Podivinsky, Jakub Lojda, Richard Panek, Ondrej Cekan, Martin Krcma, Zdenek Kotásek:
Evaluation Platform For Testing Fault Tolerance: Testing Reliability of Smart Electronic Locks. LASCAS 2020: 1-4
2010 – 2019
- 2019
- [c11]Ondrej Cekan, Jakub Podivinsky, Jakub Lojda, Richard Panek, Martin Krcma, Zdenek Kotásek:
Testing Reliability of Smart Electronic Locks: Analysis and the First Steps Towards. DSD 2019: 506-513 - [c10]Jakub Podivinsky, Ondrej Cekan, Martin Krcma, Radek Burget, Tomas Hruska, Zdenek Kotásek:
Multidimensional Pareto Frontiers Intersection Determination and Processor Optimization Case Study. DSD 2019: 597-600 - [c9]Martin Krcma, Zdenek Kotásek, Jakub Lojda:
Detecting hard synapses faults in artificial neural networks. LATS 2019: 1-6 - 2018
- [c8]Jalab Podivinsky, Ondrej Cekan, Martin Krcma, Radek Burget, Tomas Hruska, Zdenek Kotásek:
A Processor Optimization Framework for a Selected Application. EWDTS 2018: 1-11 - 2017
- [j1]Jakub Podivinsky, Ondrej Cekan, Jakub Lojda, Marcela Zachariásová, Martin Krcma, Zdenek Kotásek:
Functional verification based platform for evaluating fault tolerance properties. Microprocess. Microsystems 52: 145-159 (2017) - [c7]Martin Krcma, Zdenek Kotásek, Jakub Lojda:
Triple modular redundancy used in field programmable neural networks. EWDTS 2017: 1-6 - [c6]Jakub Lojda, Jakub Podivinsky, Zdenek Kotásek, Martin Krcma:
Data types and operations modifications: A practical approach to fault tolerance in HLS. EWDTS 2017: 1-6 - [c5]Martin Krcma, Zdenek Kotásek, Jakub Lojda:
Comparison of FPNNs models approximation capabilities and FPGA resources utilization. ICCP 2017: 125-132 - 2016
- [c4]Martin Krcma, Zdenek Kotásek, Jakub Lojda:
Implementation of fault tolerant techniques into FPNNs. FPT 2016: 297-298 - [c3]Jakub Lojda, Jakub Podivinsky, Martin Krcma, Zdenek Kotásek:
HLS-based fault tolerance approach for SRAM-based FPGAs. FPT 2016: 301-302 - 2015
- [c2]Martin Krcma, Jan Kastil, Zdenek Kotásek:
Mapping Trained Neural Networks to FPNNs. DDECS 2015: 157-160 - [c1]Martin Krcma, Zdenek Kotásek, Jan Kastil:
Fault tolerant Field Programmable Neural Networks. NORCAS 2015: 1-4
Coauthor Index
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