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Hyun-Gi Seok
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2020 – today
- 2023
- [j4]Wan Kim, Hyun-Gi Seok, Geunhaeng Lee, Sinyoung Kim, Jae-Keun Lee, Chanho Kim, Wonkang Kim, Wonjun Jung, Youngsea Cho, Seungyong Bae, Jongpil Cho, Hyuokju Na, Byoungjoong Kang, Honggul Han, Hyeonuk Son, Suhyeon Lee, Dongsu Kim, Ji-Seon Paek, Seunghyun Oh, Jongwoo Lee, Sungung Kwak, Joonsuk Kim:
A Fully Integrated IEEE 802.15.4/4z-Compliant UWB System-on-Chip RF Transceiver Supporting Precision Positioning in a CMOS 28-nm Process. IEEE J. Solid State Circuits 58(12): 3408-3420 (2023) - [c4]Wan Kim, Hyun-Gi Seok, Geunhaeng Lee, Sinyoung Kim, Jae-Keun Lee, Chanho Kim, Wonkang Kim, Wonjun Jung, Youngsea Cho, Seungyong Bae, Jongpil Cho, Hyeokju Na, Byoungjoong Kang, Honggul Han, Hyeonuk Son, Chiyoung Ahn, Hoon Kang, Sukjin Jung, Hyukjun Sung, Yeongdae Kim, Donghan Kim, Dongsu Kim, Ji-Seon Paek, Seunghyun Oh, Jongwoo Lee, Sungung Kwak, Joonsuk Kim:
A Fully Integrated IEEE 802.15.4/4z-Compliant 6.5-to-8GHz UWB System-on-Chip RF Transceiver Supporting Precision Positioning in a CMOS 28nm Process. ISSCC 2023: 462-463 - 2022
- [j3]Barosaim Sung, Hyun-Gi Seok, Jaekwon Kim, Jaehoon Lee, Taejin Jang, Ilhoon Jang, Youngmin Kim, Anna Yu, Jong-Hyun Jang, Jiyoung Lee, Jeongyeol Bae, Euiyoung Park, Sung-Jun Lee, Seokwon Lee, Joohan Kim, Beomkon Kim, Yong Lim, Seunghyun Oh, Jongwoo Lee:
A Single Path Digital-IF Receiver Supporting Inter/Intra 5-CA With a Single Integer LO-PLL in 14-nm CMOS FinFET. IEEE J. Solid State Circuits 57(12): 3646-3655 (2022) - [c3]Barosaim Sung, Hyun-Gi Seok, Jaekwon Kim, Jaehoon Lee, Taejin Jang, Ilhoon Jang, Youngmin Kim, Anna Yu, Jong-Hyun Jang, Jiyoung Lee, Jeongyeol Bae, Euiyoung Park, Sung-Jun Lee, Seokwon Lee, Joohan Kim, Beomkon Kim, Yong Lim, Seunghyun Oh, Jongwoo Lee, Thomas Byunghak Cho, Inyup Kang:
A Single-Path Digital-IF Receiver Supporting Inter/Intra 5-CA with a Single Integer LO-PLL in 14nm CMOS FinFET. ISSCC 2022: 440-442 - 2021
- [j2]Keun-Mok Kim, Hyun-Gi Seok, Oh-Yong Jung, Kyung-Sik Choi, Byeonghun Yun, Subin Kim, Wonkab Oh, Eui-Rim Jeong, Jinho Ko, Sang-Gug Lee:
A -123-dBm Sensitivity Split-Channel BFSK Reconfigurable Data/Wake-Up Receiver for Low-Power Wide-Area Networks. IEEE J. Solid State Circuits 56(9): 2656-2667 (2021) - [c2]Keun-Mok Kim, Hyun-Gi Seok, Jeong-Il Seo, Kyung-Sik Choi, Sang-Gug Lee:
0.6 V 8.1/0.2µW Ultra-Low-Power Logarithmic Power Detectors Employing Subthreshold MOS Transistors. A-SSCC 2021: 1-3
2010 – 2019
- 2018
- [j1]Oh-Yong Jung, Hyun-Gi Seok, Anjana Dissanayake, Sang-Gug Lee:
A 45-µW, 162.1-dBc/Hz FoM, 490-MHz Two-Stage Differential Ring VCO Without a Cross-Coupled Latch. IEEE Trans. Circuits Syst. II Express Briefs 65-II(11): 1579-1583 (2018) - [c1]Oh-Yong Jung, Hyun-Gi Seok, Anjana Dissanayake, Sang-Gug Lee:
A 2.4GHz, -102dBm-sensitivity, 25kb/s, 0.466mW interference resistant BFSK multi-channel sliding-IF ULP receiver. ASP-DAC 2018: 319-320
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