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Hongjie Xu

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2020 – today

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2024
[c4]
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  - conf/gecco/XuS0024
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Hongjie Xu, Yunzhuang Shen, Yuan Sun, Xiaodong Li:
Machine Learning-Enhanced Ant Colony Optimization for Column Generation. GECCO 2024
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  - journals/corr/abs-2407-01546
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Hongjie Xu, Yunzhuang Shen, Yuan Sun, Xiaodong Li:
Machine Learning-Enhanced Ant Colony Optimization for Column Generation. CoRR abs/2407.01546 (2024)
2023
[j5]
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Binhong Li, Jiaxi Luo, Hongjie Xu:
A Portfolio Selection Strategy Based on the Peak Price Involving Randomness. IEEE Access 11: 52066-52074 (2023)
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Zhixuan Wu, Ziqiong Wang, Haodong Wu, Na Zheng, Dongdong Huang, Zhipeng Huang, Hui Han, Jingxia Bao, Hongjie Xu, Rongrong Zhang, Zhou Du, Dazhou Wu:
The pan-cancer multi-omics landscape of key genes of sialylation combined with RNA-sequencing validation. Comput. Biol. Medicine 166: 107556 (2023)
2021
[b1]
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Hongjie Xu:
Energy-Efficient On-Chip Cache Architectures and Deep Neural Network Accelerators Considering the Cost of Data Movement. Kyoto University, Japan, 2021
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Hongjie Xu, Jun Shiomi, Hidetoshi Onodera:
Evaluation Metrics for the Cost of Data Movement in Deep Neural Network Acceleration. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 104-A(11): 1488-1498 (2021)
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Hongjie Xu, Jun Shiomi, Hidetoshi Onodera:
MOSDA: On-Chip Memory Optimized Sparse Deep Neural Network Accelerator With Efficient Index Matching. IEEE Open J. Circuits Syst. 2: 144-155 (2021)
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Hongjie Xu, Jinhu Ren, Yingru Wang:
The Application Research of System Cooperative Design Engineering Based on MSFC Architecture. CSDM Asia / CSDM 2021: 501
2020
[c2]
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Hongjie Xu, Jun Shiomi, Hidetoshi Onodera:
On-chip Memory Optimized CNN Accelerator with Efficient Partial-sum Accumulation. ACM Great Lakes Symposium on VLSI 2020: 21-26

2010 – 2019

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2019
[j1]
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Hongjie Xu, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera:
On-Chip Cache Architecture Exploiting Hybrid Memory Structures for Near-Threshold Computing. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 102-A(12): 1741-1750 (2019)
2018
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Hongjie Xu, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera:
Maximizing Energy Efficiency of on-Chip Caches Exploiting Hybrid Memory Structure. PATMOS 2018: 237-242

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