default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDMichel J. Declercq
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2010 – 2019
- 2011
[j18]Prakash E. Thoppay, Catherine Dehollain, Michael M. Green, Michel J. Declercq:
A 0.24-nJ/bit Super-Regenerative Pulsed UWB Receiver in 0.18- μ m CMOS. IEEE J. Solid State Circuits 46(11): 2623-2634 (2011)- 2010
- [j17]Nicolas Pillin, Norbert Joehl, Catherine Dehollain, Michel J. Declercq:
Wireless Voltage Regulation for Passive Transponders Using an IF to Communicate. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(3): 714-724 (2010)
2000 – 2009
- 2009
- [c25]Kanber Mithat Silay, Denis Dondi, Luca Larcher
, Michel J. Declercq, Luca Benini, Yusuf Leblebici, Catherine Dehollain:
Load Optimization of an Inductive Power Link for Remote Powering of Biomedical Implants. ISCAS 2009: 533-536 - 2008
- [c24]Prakash E. Thoppay, Catherine Dehollain, Michel J. Declercq:
A 7.5mA 500 MHz UWB receiver based on super-regenerative principle. ESSCIRC 2008: 382-385 - [c23]Yogesh Singh Chauhan, Dimitrios Tsamados, Nicolas Abelé, Christoph Eggimann, Michel J. Declercq, Adrian M. Ionescu:
Compact Modeling of Suspended Gate FET. VLSI Design 2008: 119-124 - 2007
- [c22]Yogesh Singh Chauhan, François Krummenacher, Renaud Gillon, Benoit Bakeroot, Michel J. Declercq, Adrian M. Ionescu:
A New Charge based Compact Model for Lateral Asymmetric MOSFET and its application to High Voltage MOSFET Modeling. VLSI Design 2007: 177-182 - 2006
- [j16]Marija Blagojevic, Maher Kayal, Marc Pastre, Louis Harik, Michel J. Declercq, Serguei Okhonin, Pierre C. Fazan:
Capacitorless 1T DRAM sensing scheme with automatic reference generation. IEEE J. Solid State Circuits 41(6): 1463-1470 (2006) - [j15]Adil Koukab, Yu Lei, Michel J. Declercq:
A GSM-GPRS/UMTS FDD-TDD/WLAN 802.11a-b-g multi-standard carrier generation system. IEEE J. Solid State Circuits 41(7): 1513-1521 (2006) - [c21]Yogesh Singh Chauhan, Costin Anghel, François Krummenacher, Renaud Gillon, Andre Baguenier, Bart Desoete, Steven Frere, Adrian Mihai Ionescu, Michel J. Declercq:
A Compact DC and AC Model for Circuit Simulation of High Voltage VDMOS Transistor. ISQED 2006: 109-114 - 2005
- [j14]Jari-Pascal Curty, Norbert Joehl, Catherine Dehollain, Michel J. Declercq:
Remotely powered addressable UHF RFID integrated system. IEEE J. Solid State Circuits 40(11): 2193-2202 (2005) - [j13]Jari-Pascal Curty, Norbert Joehl, François Krummenacher, Catherine Dehollain, Michel J. Declercq:
A model for μ-power rectifier analysis and design. IEEE Trans. Circuits Syst. I Regul. Pap. 52-I(12): 2771-2779 (2005) - [c20]Adil Koukab, Yu Lei, Michel J. Declercq:
Multistandard carrier generation system for quad-band GSM/WCDMA (FDD-TDD)/WLAN (802.11 a-b-g) radio. ESSCIRC 2005: 177-180 - 2004
- [j12]Nicolas Schlumpf, Michel J. Declercq, Catherine Dehollain:
A fast Modulator for dynamic supply linear RF power amplifier. IEEE J. Solid State Circuits 39(7): 1015-1025 (2004) - [j11]Adil Koukab, Kaustav Banerjee, Michel J. Declercq:
Modeling techniques and verification methodologies for substrate coupling effects in mixed-signal system-on-chip designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(6): 823-836 (2004) - 2003
- [c19]Nicolas Schlumpf, Michel J. Declercq, Catherine Dehollain:
A fast modulator for dynamic supply linear RF power amplifier. ESSCIRC 2003: 429-432 - [c18]Guillaume Ding, Catherine Dehollain, Michel J. Declercq, Kamran Azadet:
Frequency-interleaving technique for high-speed A/D conversion. ISCAS (1) 2003: 857-860 - 2002
- [c17]Lionel Portmann, Hussein Ballan, Michel J. Declercq:
SOI Hall effect sensor operating up to 270°C. CICC 2002: 269-272 - [c16]Adrian M. Ionescu, Michel J. Declercq, Santanu Mahapatra, Kaustav Banerjee, Jacques Gautier:
Few electron devices: towards hybrid CMOS-SET integrated circuits. DAC 2002: 88-93 - [c15]Adil Koukab, Catherine Dehollain, Michel J. Declercq:
HSpeedEx: a high-speed extractor for substrate noise analysis in complex mixed signal SOC. DAC 2002: 767-770 - [c14]Adil Koukab, Kaustav Banerjee, Michel J. Declercq:
Analysis and optimization of substrate noise coupling in single-chip RF transceiver design. ICCAD 2002: 309-316 - [c13]Santanu Mahapatra, Adrian M. Ionescu, Kaustav Banerjee, Michel J. Declercq:
A SET quantizer circuit aiming at digital communication system. ISCAS (5) 2002: 860-863 - [c12]Adrian M. Ionescu, V. Pott, R. Fritschi, Kaustav Banerjee, Michel J. Declercq, Philippe Renaud, C. Hibert, Philippe Flückiger, G. A. Racine:
Modeling and Design of a Low-Voltage SOI Suspended-Gate MOSFET (SG-MOSFET) with a Metal-over-Gate Architecture. ISQED 2002: 496-501 - 2001
- [j10]Alexandre Vouilloz, Michel J. Declercq, Catherine Dehollain:
A low-power CMOS super-regenerative receiver at 1 GHz. IEEE J. Solid State Circuits 36(3): 440-451 (2001) - [j9]Norbert Joehl, Catherine Dehollain, Patrick Favre, Philippe Deval, Michel J. Declercq:
A low-power 1-GHz super-regenerative transceiver with time-shared PLL control. IEEE J. Solid State Circuits 36(7): 1025-1031 (2001) - 2000
- [c11]Alexandre Vouilloz, Catherine Dehollain, Michel J. Declercq:
A low-power CMOS super-regenerative receiver at 1 GHz. CICC 2000: 167-170 - [c10]Tristan Reimann, François Krummenacher, B. Willing, P. Muralt, Michel J. Declercq:
A CMOS readout circuit for pico-ampere thin film pyroelectric array detectors. CICC 2000: 395-398
1990 – 1999
- 1999
- [j8]Riad Kanan, Michel J. Declercq:
PCFL3: a low-power, high-speed, single-ended logic family. IEEE J. Solid State Circuits 34(9): 1259-1269 (1999) - [c9]Alexandre Vouilloz, Catherine Dehollain, Michel J. Declercq:
Modelisation and simulation of integrated super-regenerative receivers. ICECS 1999: 521-524 - [c8]François Kaess, Riad Kanan, Bertrand Hochet, Michel J. Declercq:
Performance/power tradeoffs in high-speed GaAs ADCs. ISCAS (2) 1999: 322-325 - [c7]Riad Kanan, François Kaess, Michel J. Declercq:
A 640 mW high accuracy 8-bit 1 GHz flash ADC encoder. ISCAS (2) 1999: 420-423 - 1998
- [j7]Pierre Favrat, Philippe Deval, Michel J. Declercq:
A high-efficiency CMOS voltage doubler. IEEE J. Solid State Circuits 33(3): 410-416 (1998) - [j6]Patrick Favre, Norbert Joehl, Alexandre Vouilloz, Philippe Deval, Catherine Dehollain, Michel J. Declercq:
A 2-V 600-μA 1-GHz BiCMOS super-regenerative receiver for ISM applications. IEEE J. Solid State Circuits 33(12): 2186-2196 (1998) - [c6]Tristan Reimann, François Krummenacher, Michel J. Declercq:
A high-speed BiCMOS switched-current track-and-hold circuit. CICC 1998: 377-380 - [c5]Maher Kayal, R. T. Lara Sáez, Michel J. Declercq:
An automatic offset compensation technique applicable to existing operational amplifier core cell. CICC 1998: 419-422 - [c4]R. T. Lara Sáez, Maher Kayal, Michel J. Declercq, M. C. Schneider:
An overview of the current steering logic (CSL): from the gate to the applications. ICECS 1998: 183-186 - 1997
- [j5]Gilles van Ruymbeke, Christian C. Enz, François Krummenacher, Michel J. Declercq:
A BiCMOS programmable continuous-time filter using image-parameter method synthesis and voltage-companding technique. IEEE J. Solid State Circuits 32(3): 377-387 (1997) - [c3]Anne De Baas, Michel J. Declercq:
EUROPRACTICE and FUSE: the European Commission programmes for supporting education and technology transfer in microelectronics. MSE 1997: 83-84 - 1996
- [j4]Tristan Reimann, François Krummenacher, Michel J. Declercq:
An 8-b, 40 msamples/s switched-current-mode track-and-hold circuit on a BiCMOS sea-of-gates array. IEEE J. Solid State Circuits 31(3): 304-311 (1996) - [j3]Riad Kanan, Bertrand Hochet, Michel J. Declercq:
Pseudo-complementary FET logic (PCFL): a low-power logic family in GaAs. IEEE J. Solid State Circuits 31(7): 992-1000 (1996) - [c2]R. T. Lara Sáez, Maher Kayal, Michel J. Declercq, M. C. Schneider:
Digital circuit techniques for mixed analog/digital circuits applications. ICECS 1996: 956-959 - 1992
- [j2]F. Dorel, Michel J. Declercq:
A prototype tool for the design-oriented symbolic analysis of analogue circuits. Int. J. Circuit Theory Appl. 20(3): 257-266 (1992) - [j1]Oscar Buset, Michel J. Declercq, Fouad Rahali, Pascal Vaucher:
A fast, single-layer, area router for semi-custom analogue circuits. Int. J. Circuit Theory Appl. 20(3): 283-298 (1992) - 1991
- [c1]P. Duchene, Michel J. Declercq, S. M. Kang:
An integrated layout system for sea-of-gates module generation. EURO-DAC 1991: 237-241
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-04-25 05:46 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
