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2020 – today
- 2024
[j7]Sen Yin
, Ruitao Wang, Jian Zhang, Xiaosen Liu, Yan Wang:
Automatic Design for W-Band Front-End System via Bottom-Up Sizing and Layout Generation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(3): 705-715 (2024)- 2023
- [j6]Fangzhou Xu, Chongfeng Wang, Xin Yu, Jinzhao Zhao, Ming Liu, Jiaqi Zhao, Licai Gao, Xiuquan Jiang, Zhaoxin Zhu, Yongjian Wu, Dezheng Wang, Shanxin Feng, Sen Yin, Yang Zhang, Jiancai Leng:
One-Dimensional Local Binary Pattern and Common Spatial Pattern Feature Fusion Brain Network for Central Neuropathic Pain. Int. J. Neural Syst. 33(6): 2350030:1-2350030:17 (2023) - [j5]Sen Yin, Ruitao Wang, Jian Zhang, Xiaosen Liu, Yan Wang:
Fast Surrogate-Assisted Constrained Multiobjective Optimization for Analog Circuit Sizing via Self-Adaptive Incremental Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(7): 2080-2093 (2023) - 2022
- [j4]Fangzhou Xu, Xiaoyan Xu, Yanan Sun, Jincheng Li, Gege Dong, Yuandong Wang, Han Li, Lei Wang, Yingchun Zhang, Shaopeng Pang, Sen Yin:
A framework for motor imagery with LSTM neural network. Comput. Methods Programs Biomed. 218: 106692 (2022) - [j3]Yanan Pan, Renke Kang, Zhigang Dong, Wenhao Du, Sen Yin, Yan Bao:
On-line prediction of ultrasonic elliptical vibration cutting surface roughness of tungsten heavy alloy based on deep learning. J. Intell. Manuf. 33(3): 675-685 (2022) - [j2]Sen Yin, Ruitao Wang, Jian Zhang, Yan Wang:
Asynchronous Parallel Expected Improvement Matrix-Based Constrained Multi-Objective Optimization for Analog Circuit Sizing. IEEE Trans. Circuits Syst. II Express Briefs 69(9): 3869-3873 (2022) - [c5]Sen Yin, Wenfei Hu, Wenyuan Zhang, Ruitao Wang, Jian Zhang, Yan Wang:
An Efficient Kriging-based Constrained Multi-objective Evolutionary Algorithm for Analog Circuit Synthesis via Self-adaptive Incremental Learning. ASP-DAC 2022: 74-79 - [c4]Wei Zhu, Jiawen Wang, Ruitao Wang, Jian Zhang, Chenguang Li, Sen Yin, Yan Wang:
A 1V 32.1 dBm 92-to-102GHz Power Amplifier with a Scalable 128-to-1 Power Combiner Achieving 15% Peak PAE in a 65nm Bulk CMOS Process. ISSCC 2022: 318-320 - 2021
- [c3]Sen Yin, Wenfei Hu, Wenyuan Zhang, Ruitao Wang, Jian Zhang, Yan Wang:
An efficient optimization method of RF passive components using RBF model. ASICON 2021: 1-4 - [c2]Wenfei Hu, Zhikai Wang, Sen Yin, Zuochang Ye, Yan Wang:
Sensitivity Importance Sampling Yield Analysis and Optimization for High Sigma Failure Rate Estimation. DAC 2021: 895-900 - [c1]Zhikai Wang, Wenfei Hu, Ziyu Gu, Wenyuan Zhang, Sen Yin, Ruitao Wang, Jian Zhang, Yan Wang:
Large-scale Integrated Circuits Simulation Based on CNT-FET Model. ICICDT 2021: 1-4
2010 – 2019
- 2018
- [j1]ChengKuei Lee, Sen Yin, Jinyu Zhang, Yan Wang, Zhiping Yu:
Study on scalability of hybrid junctionless FinFET and multi-stacked nanowire FET by TCAD simulation. IEICE Electron. Express 15(21): 20180884 (2018)
Coauthor Index
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