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2020 – today
- 2025
[c7]Po-Kai Hsu, Sungwon Cho, Janak Sharda, Hyeonwoo Park, Suman Datta, Shimeng Yu:
Monolithic 3D Stackable DRAM Design with BEOL-Compatible Oxide Channel Access Transistor. IMW 2025: 1-4- [i3]Wei-Hsing Huang, Janak Sharda, Cheng-Jhih Shih, Yuyao Kong, Faaiq Waqar, Pin-Jun Chen, Yingyan Lin, Shimeng Yu:
A3D-MoE: Acceleration of Large Language Models with Mixture of Experts via 3D Heterogeneous Integration. CoRR abs/2507.19142 (2025) - [i2]Yue Pan, Zihan Xia, Po-Kai Hsu, Lanxiang Hu, Hyungyo Kim, Janak Sharda, Minxuan Zhou, Nam Sung Kim, Shimeng Yu, Tajana Rosing, Mingu Kang:
Stratum: System-Hardware Co-Design with Tiered Monolithic 3D-Stackable DRAM for Efficient MoE Serving. CoRR abs/2510.05245 (2025) - 2024
- [j3]Yuan-Chun Luo
, Anni Lu, Janak Sharda, Moritz Scherer, Jorge Tomás Gómez, Syed Shakib Sarwar, Ziyun Li, Reid Frederick Pinkham, Barbara De Salvo, Shimeng Yu:
Thermally Constrained Codesign of Heterogeneous 3-D Integration of Compute-in-Memory, Digital ML Accelerator, and RISC-V Cores for Mixed ML and Non-ML Workloads. IEEE Trans. Very Large Scale Integr. Syst. 32(9): 1718-1725 (2024) - [c6]Janak Sharda, Po-Kai Hsu, Shimeng Yu:
Accelerator Design using 3D Stacked Capacitorless DRAM for Large Language Models. AICAS 2024: 487-491 - [c5]Janak Sharda, Qiucheng Wu, Shiyu Chang, Shimeng Yu:
Impact of In-Pixel Processing Circuit Non-idealities on Multi-object Tracking Accuracy for Autonomous Driving. MWSCAS 2024: 806-810 - 2023
- [j2]Janak Sharda, Wantong Li, Qiucheng Wu, Shiyu Chang, Shimeng Yu:
Temporal Frame Filtering for Autonomous Driving Using 3D-Stacked Global Shutter CIS With IWO Buffer Memory and Near-Pixel Compute. IEEE Trans. Circuits Syst. I Regul. Pap. 70(5): 2074-2084 (2023) - 2022
- [j1]Varun Bhavin Desai, Divya Kaushik, Janak Sharda, Debanjan Bhowmik:
On-chip learning of a domain-wall-synapse-crossbar-array-based convolutional neural network. Neuromorph. Comput. Eng. 2(2): 24006 (2022) - [c4]Wantong Li, Qiucheng Wu, Janak Sharda, Shiyu Chang, Shimeng Yu:
Temporal Frame Filtering with Near-Pixel Compute for Autonomous Driving. AICAS 2022: 29-32 - 2021
- [c3]Janak Sharda, Ritvik Sharma, Debanjan Bhowmik:
A Crossbar Array of Analog-Digital-Hybrid Volatile Memory Synapse Cells for Energy-Efficient On-Chip Learning. ISCAS 2021: 1-5 - 2020
- [c2]Janak Sharda, Nilabjo Dey, Ankesh Jain, Debanjan Bhowmik:
Reduction of the Weight-Decay Rate of Volatile Memory Synapses in an Analog Hardware Neural Network for Accurate and Scalable On-Chip Learning. ICONS 2020: 13:1-13:8
2010 – 2019
- 2019
- [c1]Nilabjo Dey, Janak Sharda, Utkarsh Saxena, Divya Kaushik, Utkarsh Singh, Debanjan Bhowmik:
On-chip Learning In A Conventional Silicon MOSFET Based Analog Hardware Neural Network. BioCAS 2019: 1-4 - [i1]Nilabjo Dey, Janak Sharda, Utkarsh Saxena, Divya Kaushik, Utkarsh Singh, Debanjan Bhowmik:
On-chip learning in a conventional silicon MOSFET based Analog Hardware Neural Network. CoRR abs/1907.00625 (2019)
Coauthor Index
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