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2020 – today
- 2025
[j10]Cristina Silvano
, Daniele Ielmini, Fabrizio Ferrandi, Leandro Fiorin, Serena Curzel, Luca Benini, Francesco Conti, Angelo Garofalo, Cristian Zambelli, Enrico Calore, Sebastiano Fabio Schifano, Maurizio Palesi, Giuseppe Ascia, Davide Patti, Nicola Petra, Davide De Caro, Luciano Lavagno, Teodoro Urso, Valeria Cardellini, Gian Carlo Cardarilli, Robert Birke, Stefania Perri:
A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms. ACM Comput. Surv. 57(11): 286:1-286:39 (2025)- [j9]Angelo Garofalo, Luca Benini:
Leveraging RISC-V for HW/SW Codesign of Flexible and Efficient TinyML SoCs. IEEE Des. Test 42(5): 8-26 (2025) - [j8]Andrea Belano, Yvan Tortorella, Angelo Garofalo, Luca Benini, Davide Rossi, Francesco Conti:
A Flexible Template for Edge Generative AI With High-Accuracy Accelerated Softmax and GELU. IEEE J. Emerg. Sel. Topics Circuits Syst. 15(2): 200-216 (2025) - [j7]Thomas Benz, Alessandro Ottaviano, Chaoqun Liang, Robert Balas, Angelo Garofalo, Francesco Restuccia, Alessandro Biondi, Davide Rossi, Luca Benini:
AXI-REALM: Safe, Modular and Lightweight Traffic Monitoring and Regulation for Heterogeneous Mixed-Criticality Systems. IEEE Trans. Computers 74(9): 3072-3086 (2025) - [c30]Run Wang, Gamze Islamoglu, Andrea Belano, Viviane Potocnik, Francesco Conti, Angelo Garofalo, Luca Benini:
VEXP: A Low-Cost RISC-V ISA Extension for Accelerated Softmax Computation in Transformers. ARITH 2025: 37-44 - [c29]Gamze Islamoglu, Luca Bertaccini, Arpan Suravi Prasad, Francesco Conti, Angelo Garofalo, Luca Benini:
MXDOTP: A RISC-V ISA Extension for Enabling Microscaling (MX) Floating-Point Dot Products. ASAP 2025: 81-84 - [c28]Danilo Cammarata, Matteo Perotti, Marco Bertuletti, Angelo Garofalo, Pasquale Davide Schiavone, David Atienza, Luca Benini:
Quadrilatero: A RISC-V programmable matrix coprocessor for low-power edge applications. CF (Companion) 2025: 66-69 - [c27]Philip Wiese, Maurus Item, Luca Bertaccini, Yvan Tortorella, Angelo Garofalo, Luca Benini:
RedMulE-FT: A Reconfigurable Fault-Tolerant Matrix Multiplication Engine. CF (Companion) 2025: 78-81 - [c26]Victor Isachi, Alessandro Nadalini, Riccardo Fiorani Gallotta, Angelo Garofalo, Francesco Conti, Davide Rossi:
FractalSync: Lightweight Scalable Global Synchronization of Massive Bulk Synchronous Parallel AI Accelerators. CF 2025: 84-87 - [c25]Christopher Reinwardt, Robert Balas, Alessandro Ottaviano, Angelo Garofalo, Luca Benini:
CVA6-VMRT: A Modular Approach Towards Time-Predictable Virtual Memory in a 64-bit Application Class RISC-V Processor. CF 2025: 116-123 - [c24]Andrea Belano, Yvan Tortorella, Angelo Garofalo, Luca Benini, Davide Rossi, Francesco Conti:
SoftEx: A Low Power and Flexible Softmax Accelerator with Fast Approximate Exponentiation. DATE 2025: 1-2 - [c23]Chaoqun Liang, Thomas Benz, Alessandro Ottaviano, Angelo Garofalo, Luca Benini, Davide Rossi:
Towards Reliable Systems: A Scalable Approach to AXI4 Transaction Monitoring. DATE 2025: 1-7 - [c22]Hong Pang, Carmine Cappetta, Riccardo Massa, Athanasios Vasilopoulos, Elena Ferro, Gamze Islamoglu, Angelo Garofalo, Francesco Conti, Luca Benini, Irem Boybat, Thomas Boesch:
Multi-Mode Borderguard Controllers for Efficient On-Chip Communication in Heterogeneous Digital/Analog Neural Processing Units. DATE 2025: 1-7 - [c21]Cristina Silvano, Fabrizio Ferrandi, Serena Curzel, Daniele Ielmini, Stefania Perri, Fanny Spagnolo, Pasquale Corsonello, Sebastiano Fabio Schifano, Cristian Zambelli, Angelo Garofalo, Francesco Conti, Luca Benini:
Multi-Partner Project: Architectures and Design Methodologies to Accelerate AI Workloads. The ICSC Flagship 2 Project. DATE 2025: 1-7 - [i33]Thomas Benz, Alessandro Ottaviano, Chaoqun Liang, Robert Balas, Angelo Garofalo, Francesco Restuccia, Alessandro Biondi, Davide Rossi, Luca Benini:
AXI-REALM: Safe, Modular and Lightweight Traffic Monitoring and Regulation for Heterogeneous Mixed-Criticality Systems. CoRR abs/2501.10161 (2025) - [i32]Chaoqun Liang, Thomas Benz, Alessandro Ottaviano, Angelo Garofalo, Luca Benini, Davide Rossi:
Towards Reliable Systems: A Scalable Approach to AXI4 Transaction Monitoring. CoRR abs/2501.17605 (2025) - [i31]Angelo Garofalo, Alessandro Ottaviano, Matteo Perotti, Thomas Benz, Yvan Tortorella, Robert Balas, Michael Rogenmoser, Chi Zhang, Luca Bertaccini, Nils Wistoff, Maicol Ciani, Cyril Koenig, Mattia Sinigaglia, Luca Valente, Paul Scheffler, Manuel Eggimann, Matheus A. Cavalcante, Francesco Restuccia, Alessandro Biondi, Francesco Conti, Frank K. Gürkaynak, Davide Rossi, Luca Benini:
A Reliable, Time-Predictable Heterogeneous SoC for AI-Enhanced Mixed-Criticality Edge Applications. CoRR abs/2502.18953 (2025) - [i30]Christopher Reinwardt, Robert Balas, Alessandro Ottaviano, Angelo Garofalo, Luca Benini:
CVA6-VMRT: A Modular Approach Towards Time-Predictable Virtual Memory in a 64-bit Application Class RISC-V Processor. CoRR abs/2504.05718 (2025) - [i29]Danilo Cammarata, Matteo Perotti, Marco Bertuletti, Angelo Garofalo, Pasquale Davide Schiavone, David Atienza, Luca Benini:
Quadrilatero: A RISC-V programmable matrix coprocessor for low-power edge applications. CoRR abs/2504.07565 (2025) - [i28]Run Wang, Gamze Islamoglu, Andrea Belano, Viviane Potocnik, Francesco Conti, Angelo Garofalo, Luca Benini:
VEXP: A Low-Cost RISC-V ISA Extension for Accelerated Softmax Computation in Transformers. CoRR abs/2504.11227 (2025) - [i27]Philip Wiese, Maurus Item, Luca Bertaccini, Yvan Tortorella, Angelo Garofalo, Luca Benini:
RedMulE-FT: A Reconfigurable Fault-Tolerant Matrix Multiplication Engine. CoRR abs/2504.14399 (2025) - [i26]Gamze Islamoglu, Luca Bertaccini, Arpan Suravi Prasad, Francesco Conti, Angelo Garofalo, Luca Benini:
MXDOTP: A RISC-V ISA Extension for Enabling Microscaling (MX) Floating-Point Dot Products. CoRR abs/2505.13159 (2025) - [i25]Victor Isachi, Alessandro Nadalini, Riccardo Fiorani Gallotta, Angelo Garofalo, Francesco Conti, Davide Rossi:
FractalSync: Lightweight Scalable Global Synchronization of Massive Bulk Synchronous Parallel AI Accelerators. CoRR abs/2506.11668 (2025) - [i24]Michael Rogenmoser, Angelo Garofalo, Luca Benini:
relOBI: A Reliable Low-latency Interconnect for Tightly-Coupled On-chip Communication. CoRR abs/2508.05354 (2025) - 2024
- [j6]Francesco Conti, Gianna Paulin, Angelo Garofalo, Davide Rossi, Alfio Di Mauro, Georg Rutishauser, Gianmarco Ottavi, Manuel Eggimann, Hayate Okuhara, Luca Benini:
Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2-8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing. IEEE J. Solid State Circuits 59(1): 128-142 (2024) - [c20]Chaoqun Liang, Alessandro Ottaviano, Thomas Benz, Mattia Sinigaglia, Luca Benini, Angelo Garofalo, Davide Rossi:
A Gigabit, DMA-enhanced Open-Source Ethernet Controller for Mixed-Criticality Systems. CF (Companion) 2024 - [c19]Thomas Benz, Alessandro Ottaviano, Robert Balas, Angelo Garofalo, Francesco Restuccia, Alessandro Biondi, Luca Benini:
AXI-REALM: A Lightweight and Modular Interconnect Extension for Traffic Regulation and Monitoring of Heterogeneous Real-Time SoCs. DATE 2024: 1-6 - [c18]Enrico Zelioli, Alessandro Ottaviano, Robert Balas, Nils Wistoff, Angelo Garofalo, Luca Benini:
vCLIC: Towards Fast Interrupt Handling in Virtualized RISC-V Mixed-Criticality Systems. ICCD 2024: 288-291 - [i23]Chaoqun Liang, Alessandro Ottaviano, Thomas Benz, Mattia Sinigaglia, Luca Benini, Angelo Garofalo, Davide Rossi:
A Gigabit, DMA-enhanced Open-Source Ethernet Controller for Mixed-Criticality Systems. CoRR abs/2406.06394 (2024) - [i22]Michael Rogenmoser, Alessandro Ottaviano, Thomas Benz, Robert Balas, Matteo Perotti, Angelo Garofalo, Luca Benini:
SentryCore: A RISC-V Co-Processor System for Safe, Real-Time Control Applications. CoRR abs/2406.06546 (2024) - [i21]Maicol Ciani, Emanuele Parisi, Alberto Musa, Francesco Barchi, Andrea Bartolini, Ari Kulmala, Rafail Psiakis, Angelo Garofalo, Andrea Acquaviva, Davide Rossi:
Unleashing OpenTitan's Potential: a Silicon-Ready Embedded Secure Element for Root of Trust and Cryptographic Offloading. CoRR abs/2406.11558 (2024) - [i20]Enrico Zelioli, Alessandro Ottaviano, Robert Balas, Nils Wistoff, Angelo Garofalo, Luca Benini:
vCLIC: Towards Fast Interrupt Handling in Virtualized RISC-V Mixed-criticality Systems. CoRR abs/2410.07798 (2024) - [i19]Andrea Belano, Yvan Tortorella, Angelo Garofalo, Luca Benini, Davide Rossi, Francesco Conti:
A Flexible Template for Edge Generative AI with High-Accuracy Accelerated Softmax & GELU. CoRR abs/2412.06321 (2024) - [i18]Francesco Conti, Angelo Garofalo, Davide Rossi, Giuseppe Tagliavini, Luca Benini:
Open-Source Heterogeneous SoCs for AI: The PULP Platform Experience. CoRR abs/2412.20391 (2024) - 2023
- [j5]Gianmarco Ottavi, Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti, Alfio Di Mauro, Luca Benini, Davide Rossi:
Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode. IEEE Trans. Circuits Syst. I Regul. Pap. 70(6): 2450-2463 (2023) - [c17]Nazareno Bruschi, Giuseppe Tagliavini, Angelo Garofalo, Francesco Conti, Irem Boybat, Luca Benini, Davide Rossi:
End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture. DATE 2023: 1-6 - [c16]Luca Valente, Asif Veeran, Mattia Sinigaglia, Yvan Tortorella, Alessandro Nadalini, Nils Wistoff, Bruno Sá, Angelo Garofalo, Rafail Psiakis, M. Tolba, Ari Kulmala, Nimisha Limaye, Ozgur Sinanoglu, Sandro Pinto, Daniele Palossi, Luca Benini, Baker Mohammad, Davide Rossi:
Shaheen: An Open, Secure, and Scalable RV64 SoC for Autonomous Nano-UAVs. HCS 2023: 1-12 - [c15]Maicol Ciani, Stefano Bonato, Rafail Psiakis, Angelo Garofalo, Luca Valente, Suresh Sugumar, Alessandro Giusti, Davide Rossi, Daniele Palossi:
Cyber Security aboard Micro Aerial Vehicles: An OpenTitan-based Visual Communication Use Case. ISCAS 2023: 1-5 - [c14]Mattia Sinigaglia, Luca Bertaccini, Luca Valente, Angelo Garofalo, Simone Benatti, Luca Benini, Francesco Conti, Davide Rossi:
ECHOES: a 200 GOPS/W Frequency Domain SoC with FFT Processor and I2S DSP for Flexible Data Acquisition from Microphone Arrays. ISCAS 2023: 1-5 - [c13]Gamze Islamoglu, Moritz Scherer, Gianna Paulin, Tim Fischer, Victor J. B. Jung, Angelo Garofalo, Luca Benini:
ITA: An Energy-Efficient Attention and Softmax Accelerator for Quantized Transformers. ISLPED 2023: 1-6 - [c12]Francesco Conti, Davide Rossi, Gianna Paulin, Angelo Garofalo, Alfio Di Mauro, Georg Rutishauser, Gianmarco Ottavi, Manuel Eggimann, Hayate Okuhara, Vincent Huard, Olivier Montfort, Lionel Jure, Nils Exibard, Pascal Gouedo, Mathieu Louvat, Emmanuel Botte, Luca Benini:
A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing. ISSCC 2023: 326-327 - [c11]Alessandro Nadalini, Georg Rutishauser, Alessio Burrello, Nazareno Bruschi, Angelo Garofalo, Luca Benini, Francesco Conti, Davide Rossi:
A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks. ISVLSI 2023: 1-6 - [i17]Maicol Ciani, Stefano Bonato, Rafail Psiakis, Angelo Garofalo, Luca Valente, Suresh Sugumar, Alessandro Giusti, Davide Rossi, Daniele Palossi:
Cyber Security aboard Micro Aerial Vehicles: An OpenTitan-based Visual Communication Use Case. CoRR abs/2303.16554 (2023) - [i16]Angelo Garofalo, Yvan Tortorella, Matteo Perotti, Luca Valente, Alessandro Nadalini, Luca Benini, Davide Rossi, Francesco Conti:
DARKSIDE: A Heterogeneous RISC-V Compute Cluster for Extreme-Edge On-Chip DNN Inference and Training. CoRR abs/2303.17954 (2023) - [i15]Mattia Sinigaglia, Luca Bertaccini, Luca Valente, Angelo Garofalo, Simone Benatti, Luca Benini, Francesco Conti, Davide Rossi:
Echoes: a 200 GOPS/W Frequency Domain SoC with FFT Processor and I2S DSP for Flexible Data Acquisition from Microphone Arrays. CoRR abs/2305.07325 (2023) - [i14]Cristina Silvano, Daniele Ielmini, Fabrizio Ferrandi, Leandro Fiorin, Serena Curzel, Luca Benini, Francesco Conti, Angelo Garofalo, Cristian Zambelli, Enrico Calore, Sebastiano Fabio Schifano, Maurizio Palesi, Giuseppe Ascia, Davide Patti, Stefania Perri, Nicola Petra, Davide De Caro, Luciano Lavagno, Teodoro Urso, Valeria Cardellini, Gian Carlo Cardarilli, Robert Birke:
A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms. CoRR abs/2306.15552 (2023) - [i13]Alessandro Nadalini, Georg Rutishauser, Alessio Burrello, Nazareno Bruschi, Angelo Garofalo, Luca Benini, Francesco Conti, Davide Rossi:
A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks. CoRR abs/2307.01056 (2023) - [i12]Gamze Islamoglu, Moritz Scherer, Gianna Paulin, Tim Fischer, Victor J. B. Jung, Angelo Garofalo, Luca Benini:
ITA: An Energy-Efficient Attention and Softmax Accelerator for Quantized Transformers. CoRR abs/2307.03493 (2023) - [i11]Thomas Benz, Alessandro Ottaviano, Robert Balas, Angelo Garofalo, Francesco Restuccia, Alessandro Biondi, Luca Benini:
AXI-REALM: A Lightweight and Modular Interconnect Extension for Traffic Regulation and Monitoring of Heterogeneous Real-Time SoCs. CoRR abs/2311.09662 (2023) - 2022
- [j4]Angelo Garofalo, Gianmarco Ottavi, Francesco Conti, Geethan Karunaratne, Irem Boybat, Luca Benini, Davide Rossi:
A Heterogeneous In-Memory Computing Cluster for Flexible End-to-End Inference of Real-World Deep Neural Networks. IEEE J. Emerg. Sel. Topics Circuits Syst. 12(2): 422-435 (2022) - [j3]Fabio Montagna, Stefan Mach, Simone Benatti, Angelo Garofalo, Gianmarco Ottavi, Luca Benini, Davide Rossi, Giuseppe Tagliavini:
A Low-Power Transprecision Floating-Point Cluster for Efficient Near-Sensor Data Analytics. IEEE Trans. Parallel Distributed Syst. 33(5): 1038-1053 (2022) - [c10]Angelo Garofalo, Matteo Perotti, Luca Valente, Yvan Tortorella, Alessandro Nadalini, Luca Benini, Davide Rossi, Francesco Conti:
Darkside: 2.6GFLOPS, 8.7mW Heterogeneous RISC-V Cluster for Extreme-Edge On-Chip DNN Inference and Training. ESSCIRC 2022: 273-276 - [i10]Angelo Garofalo, Gianmarco Ottavi, Francesco Conti, Geethan Karunaratne, Irem Boybat, Luca Benini, Davide Rossi:
A Heterogeneous In-Memory Computing Cluster For Flexible End-to-End Inference of Real-World Deep Neural Networks. CoRR abs/2201.01089 (2022) - [i9]Gianmarco Ottavi, Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti, Alfio Di Mauro, Luca Benini, Davide Rossi:
Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode. CoRR abs/2201.08656 (2022) - [i8]Nazareno Bruschi, Giuseppe Tagliavini, Angelo Garofalo, Francesco Conti, Irem Boybat, Luca Benini, Davide Rossi:
End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture. CoRR abs/2211.12877 (2022) - [i7]Manuel Le Gallo, Riduan Khaddam-Aljameh, Milos Stanisavljevic, Athanasios Vasilopoulos, Benedikt Kersting, Martino Dazzi, Geethan Karunaratne, Matthias Braendli, Abhairaj Singh, Silvia M. Mueller, Julian Büchel, Xavier Timoneda Comas, Vinay Joshi, Urs Egger, Angelo Garofalo, Anastasios Petropoulos, Theodore Antonakopoulos, Kevin Brew, Samuel Choi, Injo Ok, Timothy Philip, Victor Chan, Mary Claire Silvestre, Ishtiaq Ahsan, Nicole Saulnier, Vijay Narayanan, Pier Andrea Francese, Evangelos Eleftheriou, Abu Sebastian:
A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference. CoRR abs/2212.02872 (2022) - 2021
- [j2]Alessio Burrello, Angelo Garofalo, Nazareno Bruschi, Giuseppe Tagliavini, Davide Rossi, Francesco Conti:
DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs. IEEE Trans. Computers 70(8): 1253-1268 (2021) - [j1]Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti, Luca Benini, Davide Rossi:
XpulpNN: Enabling Energy Efficient and Flexible Inference of Quantized Neural Networks on RISC-V Based IoT End Nodes. IEEE Trans. Emerg. Top. Comput. 9(3): 1489-1505 (2021) - [c9]Fabio Montagna, Giuseppe Tagliavini, Davide Rossi, Angelo Garofalo, Luca Benini:
Streamlining the OpenMP Programming Model on Ultra-Low-Power Multi-core MCUs. ARCS 2021: 167-182 - [c8]Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti, Luca Benini, Davide Rossi:
XpulpNN: Enabling Energy Efficient and Flexible Inference of Quantized Neural Networks on RISC-V based IoT End Nodes. ARITH 2021: 53 - [c7]Angelo Garofalo, Gianmarco Ottavi, Alfio Di Mauro, Francesco Conti, Giuseppe Tagliavini, Luca Benini, Davide Rossi:
A 1.15 TOPS/W, 16-Cores Parallel Ultra-Low Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode. ESSCIRC 2021: 267-270 - 2020
- [c6]Nazareno Bruschi, Angelo Garofalo, Francesco Conti, Giuseppe Tagliavini, Davide Rossi:
Enabling mixed-precision quantized neural networks in extreme-edge devices. CF 2020: 217-220 - [c5]Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti, Davide Rossi, Luca Benini:
XpulpNN: Accelerating Quantized Neural Networks on RISC-V Processors Through ISA Extensions. DATE 2020: 186-191 - [c4]Gianmarco Ottavi, Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti, Luca Benini, Davide Rossi:
A Mixed-Precision RISC-V Processor for Extreme-Edge DNN Inference. ISVLSI 2020: 512-517 - [i6]Nazareno Bruschi, Angelo Garofalo, Francesco Conti, Giuseppe Tagliavini, Davide Rossi:
Enabling Mixed-Precision Quantized Neural Networks in Extreme-Edge Devices. CoRR abs/2007.07759 (2020) - [i5]Alessio Burrello, Angelo Garofalo, Nazareno Bruschi, Giuseppe Tagliavini, Davide Rossi, Francesco Conti:
DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs. CoRR abs/2008.07127 (2020) - [i4]Fabio Montagna, Stefan Mach, Simone Benatti, Angelo Garofalo, Gianmarco Ottavi, Luca Benini, Davide Rossi, Giuseppe Tagliavini:
A transprecision floating-point cluster for efficient near-sensor data analytics. CoRR abs/2008.12243 (2020) - [i3]Gianmarco Ottavi, Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti, Luca Benini, Davide Rossi:
A Mixed-Precision RISC-V Processor for Extreme-Edge DNN Inference. CoRR abs/2010.04073 (2020) - [i2]Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti, Luca Benini, Davide Rossi:
XpulpNN: Enabling Energy Efficient and Flexible Inference of Quantized Neural Network on RISC-V based IoT End Nodes. CoRR abs/2011.14325 (2020)
2010 – 2019
- 2019
- [c3]Alessio Burrello, Francesco Conti, Angelo Garofalo, Davide Rossi, Luca Benini:
DORY: Lightweight memory hierarchy management for deep NN inference on IoT endnodes: work-in-progress. CODES+ISSS 2019: 17:1-17:2 - [c2]Annachiara Ruospo, Riccardo Cantoro, Ernesto Sánchez, Pasquale Davide Schiavone, Angelo Garofalo, Luca Benini:
On-line Testing for Autonomous Systems driven by RISC-V Processor Design Verification. DFT 2019: 1-6 - [c1]Angelo Garofalo, Manuele Rusci, Francesco Conti, Davide Rossi, Luca Benini:
PULP-NN: A Computing Library for Quantized Neural Network inference at the edge on RISC-V Based Parallel Ultra Low Power Clusters. ICECS 2019: 33-36 - [i1]Angelo Garofalo, Manuele Rusci, Francesco Conti, Davide Rossi, Luca Benini:
PULP-NN: Accelerating Quantized Neural Networks on Parallel Ultra-Low-Power RISC-V Processors. CoRR abs/1908.11263 (2019)
Coauthor Index
[j10] [j9] [j8] [j7] [c30] [c29] [c28] [c27] [c25] [c24] [c23] [c22] [c21] [i33] [i32] [i31] [i30] [i29] [i28] [i27] [i26] [i24] [j6] [c20] [c19] [c18] [i23] [i22] [i20] [i19] [i18] [j5] [c17] [c16] [c14] [c13] [c12] [c11] [i16] [i15] [i14] [i13] [i12] [i11] [j4] [j3] [c10] [i10] [i9] [i8] [j1] [c9] [c8] [c7] [c5] [c4] [i4] [i3] [i2] [c3] [c2] [c1] [i1]
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