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2020 – today
- 2025
[j5]Atiyeh Gheibi-Fetrat, Fatemeh Serajeh-hassani, Masoud Mohammadi-Lak
, Amir Mirzaei, Negar Akbarzadeh, Mahmoud Reza Kheyrati-Fard, Mohammad Hosseini, Ahmad Javadi Nezhad, Arash Tavakkol, Jeong A. Lee, Hamid Sarbazi-Azad:
A survey of SSD simulators and emulators. J. Supercomput. 81(4): 592 (2025)- [j4]Atiyeh Gheibi-Fetrat, Fatemeh Serajeh-hassani, Negar Akbarzadeh, Amir Mirzaei, Mahmoud Reza Kheyrati-Fard, Ahmad Javadi Nezhad, Jeong A. Lee, Hamid Sarbazi-Azad:
A comprehensive review and classification of micro-scale and macro-scale interconnection network simulators for research and education in network-based computing systems. J. Supercomput. 81(16): 1553 (2025) - [j3]Amir Mirzaei, Fatemeh Serajeh-hassani, Atiyeh Gheibi-Fetrat, Mina Zabihi, Sina Ghorbani-Jabbedar, Mahmoud Reza Kheyrati-Fard, Ahmad Javadi Nezhad, Seyed Mohammad Hosseini, Negar Akbarzadeh, Jeong A. Lee, Hamid Sarbazi-Azad:
MQSimNet: an open-source simulator for next-generation network-based SSDs. J. Supercomput. 81(17) (2025) - 2024
- [j2]Fatemeh Serajeh-hassani, Mohammad Sadrosadati, Nezam Rohbani, Sebastian Pointner, Robert Wille, Hamid Sarbazi-Azad:
An Efficient FPGA Architecture with Turn-Restricted Switch Boxes. ACM Trans. Design Autom. Electr. Syst. 29(3): 42:1-42:18 (2024) - 2023
- [j1]Samira Riki, Fatemeh Serajeh-hassani:
Designing a one-bit coplanar QCA ALU using a novel robust area-efficient three-input majority gate design. J. Supercomput. 79(16): 17897-17918 (2023)
2010 – 2019
- 2019
- [c1]Fatemeh Serajeh-hassani, Mohammad Sadrosadati, Sebastian Pointner, Robert Wille, Hamid Sarbazi-Azad:
Focus on What is Needed: Area and Power Efficient FPGAs Using Turn-Restricted Switch Boxes. ISVLSI 2019: 615-620
Coauthor Index
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