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2020 – today
- 2024
[c17]Monodeep Kar, Joel Silberman, Swagath Venkataramani, Viji Srinivasan, Bruce M. Fleischer, Joshua Rubin, JohnDavid Lancaster, Sae Kyu Lee, Matthew Cohen, Matthew M. Ziegler, Nianzheng Cao, Sandra Woodward, Ankur Agrawal, Ching Zhou, Prasanth Chatarasi, Thomas Gooding, Michael Guillorn, Bahman Hekmatshoartabari, Philip Jacob, Radhika Jain, Shubham Jain, Jinwook Jung, Kyu-Hyoun Kim
, Siyu Koswatta, Martin Lutz, Alberto Mannari, Abey Mathew, Indira Nair, Ashish Ranjan, Zhibin Ren, Scot Rider, Thomas Roewer, David L. Satterfield, Marcel Schaal, Sanchari Sen, Gustavo Tellez, Hung Tran, Wei Wang, Vidhi Zalani, Jintao Zhang, Xin Zhang, Vinay Shah, Robert M. Senger, Arvind Kumar, Pong-Fei Lu, Leland Chang:
14.1 A Software-Assisted Peak Current Regulation Scheme to Improve Power-Limited Inference Performance in a 5nm AI SoC. ISSCC 2024: 254-256- 2023
- [j3]Yutaka Sugawara, Dong Chen, Ruud A. Haring, Abdullah Kayi, Eugene Ratzlaff, Robert M. Senger, Krishnan Sugavanam, Ralph Bellofatto, Ben J. Nathanson, Craig B. Stunkel:
Data Movement Accelerator Engines on a Prototype Power10 Processor. IEEE Micro 43(1): 67-75 (2023)
2010 – 2019
- 2014
- [c16]Chen-Yong Cher, K. Paul Muller, Ruud A. Haring, David L. Satterfield, Thomas E. Musta, Thomas Gooding, Kristan D. Davis, Marc Boris Dombrowa, Gerard V. Kopcsay, Robert M. Senger, Yutaka Sugawara, Krishnan Sugavanam:
Soft Error Resiliency Characterization on IBM BlueGene/Q Processor. ASP-DAC 2014: 385-387 - [c15]Chen-Yong Cher, K. Paul Muller, Ruud A. Haring, David L. Satterfield, Thomas E. Musta, Thomas Gooding, Kristan D. Davis, Marc Boris Dombrowa, Gerard V. Kopcsay, Robert M. Senger, Yutaka Sugawara, Krishnan Sugavanam:
Soft error resiliency characterization and improvement on IBM BlueGene/Q processor using accelerated proton irradiation. ITC 2014: 1-6 - 2013
- [c14]Alan J. Drake, Michael S. Floyd, Richard L. Willaman, Derek J. Hathaway, Joshua Hernandez, Crystal Soja, Marshall D. Tiner, Gary D. Carpenter, Robert M. Senger:
Single-cycle, pulse-shaped critical path monitor in the POWER7+ microprocessor. ISLPED 2013: 193-198 - 2012
- [j2]Dong Chen, Noel Eisley, Philip Heidelberger, Robert M. Senger, Yutaka Sugawara, Sameer Kumar, Valentina Salapura, David L. Satterfield, Burkhard D. Steinmacher-Burow, Jeffrey J. Parker:
The IBM Blue Gene/Q Interconnection Fabric. IEEE Micro 32(1): 32-43 (2012) - [c13]Dong Chen, Noel Eisley, Philip Heidelberger, Sameer Kumar, Amith R. Mamidala, Fabrizio Petrini, Robert M. Senger, Yutaka Sugawara, Robert Walkup, Burkhard D. Steinmacher-Burow, Anamitra R. Choudhury, Yogish Sabharwal, Swati Singhal, Jeffrey J. Parker:
Looking under the hood of the IBM blue gene/Q network. SC 2012: 69 - 2011
- [c12]Dong Chen, Noel Eisley, Philip Heidelberger, Robert M. Senger, Yutaka Sugawara, Sameer Kumar, Valentina Salapura, David L. Satterfield, Burkhard D. Steinmacher-Burow, Jeffrey J. Parker:
The IBM Blue Gene/Q interconnection network and message unit. SC 2011: 26:1-26:10
2000 – 2009
- 2007
- [c11]Alan J. Drake, Robert M. Senger, Harmander Deogun, Gary D. Carpenter, Soraya Ghiasi, Tuyet Nguyen, Norman K. James, Michael S. Floyd, Vikas Pokala:
A Distributed Critical-Path Timing Monitor for a 65nm High-Performance Microprocessor. ISSCC 2007: 398-399 - 2006
- [c10]Robert M. Senger, Eric D. Marsman, Michael S. McCorquodale, Richard B. Brown:
A 16-bit, low-power microsystem with monolithic MEMS-LC clocking. ASP-DAC 2006: 94-95 - [c9]Eric D. Marsman, Robert M. Senger, Gordy A. Carichner, Sundus Kubba, Michael S. McCorquodale, Richard B. Brown:
DSP architecture for cochlear implants. ISCAS 2006 - [c8]Robert M. Senger, Eric D. Marsman, Gordy A. Carichner, Sundus Kubba, Michael S. McCorquodale, Richard B. Brown:
Low-latency, HDL-synthesizable dynamic clock frequency controller with self-referenced hybrid clocking. ISCAS 2006 - [c7]Harmander Deogun, Robert M. Senger, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka:
A dual-VDD boosted pulsed bus technique for low power and low leakage operation. ISLPED 2006: 73-78 - 2005
- [j1]Rajiv A. Ravindran, Robert M. Senger, Eric D. Marsman, Ganesh S. Dasika, Matthew R. Guthaus, Scott A. Mahlke, Richard B. Brown:
Partitioning Variables across Register Windows to Reduce Spill Code in a Low-Power Processor. IEEE Trans. Computers 54(8): 998-1012 (2005) - [c6]Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh S. Dasika, Eric D. Marsman, Robert M. Senger, Scott A. Mahlke, Richard B. Brown:
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache. CGO 2005: 179-190 - [c5]Robert M. Senger, Eric D. Marsman, Michael S. McCorquodale:
A 16-bit low-power microcontroller with monolithic MEMS-LC clocking. ISCAS (1) 2005: 624-627 - 2003
- [c4]Rajiv A. Ravindran, Robert M. Senger, Eric D. Marsman, Ganesh S. Dasika, Matthew R. Guthaus, Scott A. Mahlke, Richard B. Brown:
Increasing the number of effective registers in a low-power processor using a windowed register file. CASES 2003: 125-136 - [c3]Robert M. Senger, Eric D. Marsman, Michael S. McCorquodale, Fadi H. Gebara, Keith L. Kraver, Matthew R. Guthaus, Richard B. Brown:
A 16-bit mixed-signal microsystem with integrated CMOS-MEMS clock reference. DAC 2003: 520-525 - [c2]Michael S. McCorquodale, Fadi H. Gebara, Keith L. Kraver, Eric D. Marsman, Robert M. Senger, Richard B. Brown:
A Top-Down Microsystems Design Methodology and Associated Challenges . DATE 2003: 20292-20296 - [c1]Michael S. McCorquodale, Eric D. Marsman, Robert M. Senger, Fadi H. Gebara, Richard B. Brown:
Microsystem and SoC Design with UMIPS. VLSI-SOC 2003: 324-
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last updated on 2024-10-07 21:16 CEST by the dblp team
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