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ORCIDMinsu Kim 0004
Person information
- affiliation: Korea Advanced Institute of Science and Technology (KAIST), Department of Electrical Engineering, Daejeon, South Korea
Other persons with the same name
- Minsu Kim (aka: Min-su Kim, Min-Su Kim) — disambiguation page
- Minsu Kim 0001
![[0000-0002-6514-0018]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png "0000-0002-6514-0018")
— Korea Advanced Institute of Science and Technology (KAIST), School of Electrical Engineering, Integrated Vision and Language Laboratory, Daejeon, South Korea (and 1 more) - Minsu Kim 0002 — Samsung Electronics Company Ltd, Network Business, Suwon, South Korea (and 1 more)
- Minsu Kim 0003 — Virginia Tech, Bradley Department of Electrical and Computer Engineering, Arlington, VA, USA
- Minsu Kim 0006 — KAIST, Korea
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2020 – today
- 2024
[j11]Seungjae Moon, Jung-Hoon Kim, Junsoo Kim, Seongmin Hong, Junseo Cha, Minsu Kim, Sukbin Lim, Gyubin Choi, Dongjin Seo, Jongho Kim, Hunjong Lee, Hyunjun Park, Ryeowook Ko, Soongyu Choi, Jongse Park, Jinwon Lee, Joo-Young Kim:
A Latency Processing Unit: A Latency-Optimized and Highly Scalable Processor for Large Language Model Inference. IEEE Micro 44(6): 17-33 (2024)- [i5]Seungjae Moon, Jung-Hoon Kim, Junsoo Kim, Seongmin Hong, Junseo Cha, Minsu Kim, Sukbin Lim, Gyubin Choi, Dongjin Seo, Jongho Kim, Hunjong Lee, Hyunjun Park, Ryeowook Ko, Soongyu Choi, Jongse Park, Jinwon Lee, Joo-Young Kim:
LPU: A Latency-Optimized and Highly Scalable Processor for Large Language Model Inference. CoRR abs/2408.07326 (2024) - 2023
- [c15]Haeyeon Kim, Minsu Kim, Federico Berto, Joungho Kim, Jinkyoo Park:
DevFormer: A Symmetric Transformer for Context-Aware Device Placement. ICML 2023: 16541-16566 - [c14]Minsu Kim, Federico Berto, Sungsoo Ahn, Jinkyoo Park:
Bootstrapped Training of Score-Conditioned Generator for Offline Design of Biological Sequences. NeurIPS 2023 - [i4]Minsu Kim, Federico Berto, Sungsoo Ahn, Jinkyoo Park:
Bootstrapped Training of Score-Conditioned Generator for Offline Design of Biological Sequences. CoRR abs/2306.03111 (2023) - [i3]Federico Berto, Chuanbo Hua, Junyoung Park, Minsu Kim, Hyeonah Kim, Jiwoo Son, Haeyeon Kim, Joungho Kim, Jinkyoo Park:
RL4CO: an Extensive Reinforcement Learning for Combinatorial Optimization Benchmark. CoRR abs/2306.17100 (2023) - 2022
- [i2]HyunWook Park, Minsu Kim, Seongguk Kim, Keunwoo Kim, Haeyeon Kim, Taein Shin, Keeyoung Son, Boogyo Sim, Subin Kim, Seungtaek Jeong, Chulsoon Hwang, Joungho Kim:
Transformer Network-based Reinforcement Learning Method for Power Distribution Network (PDN) Optimization of High Bandwidth Memory (HBM). CoRR abs/2203.15722 (2022) - [i1]Haeyeon Kim, Minsu Kim, Joungho Kim, Jinkyoo Park:
Collaborative Distillation Meta Learning for Simulation Intensive Hardware Design. CoRR abs/2205.13225 (2022)
2010 – 2019
- 2019
- [c13]Dongku Kang, Minsu Kim, Suchang Jeon, Wontaeck Jung, Jooyong Park, Gyo Soo Choo, Dong-Kyo Shim, Anil Kavala, Seungbum Kim, Kyung-Min Kang, Jiyoung Lee, Kuihan Ko, Hyun Wook Park, ByungJun Min, Changyeon Yu, Sewon Yun, Nahyun Kim, Yeonwook Jung, Sungwhan Seo, Sunghoon Kim, Moo Kyung Lee, Joo-Yong Park, James C. Kim, Young San Cha, Kwangwon Kim, Youngmin Jo, Hyun-Jin Kim, Youngdon Choi, Jindo Byun, Ji-hyun Park, Kiwon Kim, Tae-Hong Kwon, Young-Sun Min, Chiweon Yoon, Youngcho Kim, Dong-Hun Kwak, Eungsuk Lee, Wook-Ghee Hahn, Ki-Sung Kim, Kyungmin Kim, Euisang Yoon, Wontae Kim, Inryul Lee, Seunghyun Moon, Jeong-Don Ihm, Dae-Seok Byeon, Ki-Whan Song, Sangjoon Hwang, Kyehyun Kyung:
A 512Gb 3-bit/Cell 3D 6th-Generation V-NAND Flash Memory with 82MB/s Write Throughput and 1.2Gb/s Interface. ISSCC 2019: 216-218 - 2018
- [c12]Seungjae Lee, Chulbum Kim, Minsu Kim, Sung-Min Joe, Joonsuc Jang, Seungbum Kim, Kangbin Lee, Jisu Kim, Jiyoon Park, Hanjun Lee, Min-Seok Kim, Seonyong Lee, SeonGeon Lee, Jinbae Bang, Dongjin Shin, Hwajun Jang, Deokwoo Lee, Nahyun Kim, Jonghoo Jo, Jonghoon Park, Sohyun Park, Youngsik Rho, Yongha Park, Hojoon Kim, Cheon An Lee, Chungho Yu, Young-Sun Min, Moosung Kim, Kyungmin Kim, Seunghyun Moon, Hyun-Jin Kim, Youngdon Choi, YoungHwan Ryu, Jinwon Choi, Minyeong Lee, Jungkwan Kim, Gyo Soo Choo, Jeong-Don Lim, Dae-Seok Byeon, Ki-Whan Song, Ki-Tae Park, Kyehyun Kyung:
A 1Tb 4b/cell 64-stacked-WL 3D NAND flash memory with 12MB/s program throughput. ISSCC 2018: 340-342 - 2016
- [c11]Seungjae Lee, Jin-Yub Lee, Il-Han Park, Jong-Yeol Park, Sung-Won Yun, Minsu Kim, Jong-Hoon Lee, Min-Seok Kim, Kangbin Lee, Taeeun Kim, Byungkyu Cho, Dooho Cho, Sangbum Yun, Jung-No Im, Hyejin Yim, Kyung-Hwa Kang, Suchang Jeon, Sungkyu Jo, Yang-Lo Ahn, Sung-Min Joe, Suyong Kim, Deok-kyun Woo, Jiyoon Park, Hyun Wook Park, Youngmin Kim, Jonghoon Park, Yongsu Choi, Makoto Hirano, Jeong-Don Ihm, Byunghoon Jeong, Seon-Kyoo Lee, Moosung Kim, Hokil Lee, Sungwhan Seo, Hongsoo Jeon, Chan-ho Kim, Hyunggon Kim, Jintae Kim, Yongsik Yim, Hoosung Kim, Dae-Seok Byeon, Hyang-Ja Yang, Ki-Tae Park, Kyehyun Kyung, Jeong-Hyuk Choi:
7.5 A 128Gb 2b/cell NAND flash memory in 14nm technology with tPROG=640µs and 800MB/s I/O rate. ISSCC 2016: 138-139 - 2015
- [j10]Ki-Tae Park, Sangwan Nam, Dae-Han Kim, Pansuk Kwak, Doosub Lee, Yoon-Hee Choi, Myung-Hoon Choi, Dong-Hun Kwak, Doo-Hyun Kim, Minsu Kim, Hyun Wook Park, Sang-Won Shim, Kyung-Min Kang, Sang-Won Park, Kangbin Lee, Hyun-Jun Yoon, Kuihan Ko, Dong-Kyo Shim, Yang-Lo Ahn, Jinho Ryu, Donghyun Kim, Kyunghwa Yun, Joonsoo Kwon, Seunghoon Shin, Dae-Seok Byeon, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Jeong-Hyuk Choi, Kinam Kim:
Three-Dimensional 128 Gb MLC Vertical nand Flash Memory With 24-WL Stacked Layers and 50 MB/s High-Speed Programming. IEEE J. Solid State Circuits 50(1): 204-213 (2015) - 2014
- [c10]Ki-Tae Park, Jin-Man Han, Dae-Han Kim, Sangwan Nam, Kihwan Choi, Minsu Kim, Pansuk Kwak, Doosub Lee, Yoon-Hee Choi, Kyung-Min Kang, Myung-Hoon Choi, Dong-Hun Kwak, Hyun Wook Park, Sang-Won Shim, Hyun-Jun Yoon, Doo-Hyun Kim, Sang-Won Park, Kangbin Lee, Kuihan Ko, Dong-Kyo Shim, Yang-Lo Ahn, Jeunghwan Park, Jinho Ryu, Donghyun Kim, Kyunghwa Yun, Joonsoo Kwon, Seunghoon Shin, Dongkyu Youn, Won-Tae Kim, Taehyun Kim, Sung-Jun Kim, Sungwhan Seo, Hyunggon Kim, Dae-Seok Byeon, Hyang-Ja Yang, Moosung Kim, Myong-Seok Kim, Jinseon Yeon, Jae-hoon Jang, Han-Soo Kim, Woonkyung Lee, Duheon Song, Sungsoo Lee, Kyehyun Kyung, Jeong-Hyuk Choi:
19.5 Three-dimensional 128Gb MLC vertical NAND Flash-memory with 24-WL stacked layers and 50MB/s high-speed programming. ISSCC 2014: 334-335 - 2011
- [j9]Seungjin Lee, Jinwook Oh, Junyoung Park, Joonsoo Kwon, Minsu Kim, Hoi-Jun Yoo:
A 345 mW Heterogeneous Many-Core Processor With an Intelligent Inference Engine for Robust Object Recognition. IEEE J. Solid State Circuits 46(1): 42-51 (2011) - [j8]Seungjin Lee, Minsu Kim, Kwanho Kim, Joo-Young Kim, Hoi-Jun Yoo:
24-GOPS 4.5-mm2 Digital Cellular Neural Network for Rapid Visual Attention in an Object-Recognition SoC. IEEE Trans. Neural Networks 22(1): 64-73 (2011) - 2010
- [j7]Joo-Young Kim, Minsu Kim, Seungjin Lee, Jinwook Oh, Kwanho Kim, Hoi-Jun Yoo:
A 201.4 GOPS 496 mW Real-Time Multi-Object Recognition Processor With Bio-Inspired Neural Perception Engine. IEEE J. Solid State Circuits 45(1): 32-45 (2010) - [j6]Joo-Young Kim, Junyoung Park, Seungjin Lee, Minsu Kim, Jinwook Oh, Hoi-Jun Yoo:
A 118.4 GB/s Multi-Casting Network-on-Chip With Hierarchical Star-Ring Combined Topology for Real-Time Object Recognition. IEEE J. Solid State Circuits 45(7): 1399-1409 (2010) - [j5]Seungjin Lee, Kwanho Kim, Joo-Young Kim, Minsu Kim, Hoi-Jun Yoo:
Familiarity based unified visual attention model for fast and robust object recognition. Pattern Recognit. 43(3): 1116-1128 (2010) - [j4]Joo-Young Kim, Sejong Oh, Seungjin Lee, Minsu Kim, Jinwook Oh, Hoi-Jun Yoo:
An attention controlled multi-core architecture for energy efficient object recognition. Signal Process. Image Commun. 25(5): 363-376 (2010) - [c9]Seungjin Lee, Jinwook Oh, Minsu Kim, Junyoung Park, Joonsoo Kwon, Joo-Young Kim, Hoi-Jun Yoo:
Intelligent NoC with neuro-fuzzy bandwidth regulation for a 51 IP object recognition processor. CICC 2010: 1-4 - [c8]Joonsoo Kwon, Minsu Kim, Jinwook Oh, Hoi-Jun Yoo:
A 22.4 mW competitive fuzzy edge detection processor for volume rendering. ISCAS 2010: 1883-1886 - [c7]Seungjin Lee, Jinwook Oh, Minsu Kim, Junyoung Park, Joonsoo Kwon, Hoi-Jun Yoo:
A 345mW heterogeneous many-core processor with an intelligent inference engine for robust object recognition. ISSCC 2010: 332-333
2000 – 2009
- 2009
- [j3]Kwanho Kim, Seungjin Lee, Joo-Young Kim, Minsu Kim, Hoi-Jun Yoo:
A 125 GOPS 583 mW Network-on-Chip Based Parallel Processor With Bio-Inspired Visual Attention Engine. IEEE J. Solid State Circuits 44(1): 136-147 (2009) - [j2]Joo-Young Kim, Minsu Kim, Seungjin Lee, Jinwook Oh, Sejong Oh, Hoi-Jun Yoo:
Real-Time Object Recognition with Neuro-Fuzzy Controlled Workload-Aware Task Pipelining. IEEE Micro 29(6): 28-43 (2009) - [j1]Kwanho Kim, Seungjin Lee, Joo-Young Kim, Minsu Kim, Hoi-Jun Yoo:
A Configurable Heterogeneous Multicore Architecture With Cellular Neural Network for Real-Time Object Recognition. IEEE Trans. Circuits Syst. Video Technol. 19(11): 1612-1622 (2009) - [c6]Minsu Kim, Joo-Young Kim, Seungjin Lee, Jinwook Oh, Hoi-Jun Yoo:
A 54GOPS 51.8mW analog-digital mixed mode Neural Perception Engine for fast object detection. CICC 2009: 649-652 - [c5]Joo-Young Kim, Kwanho Kim, Seungjin Lee, Minsu Kim, Jinwook Oh, Hoi-Jun Yoo:
A 118.4GB/s multi-casting network-on-chip for real-time object recognition processor. ESSCIRC 2009: 400-403 - [c4]Joo-Young Kim, Seungjin Lee, Jinwook Oh, Minsu Kim, Hoi-Jun Yoo:
A 60fps 496mW multi-object recognition processor with workload-aware dynamic power management. ISLPED 2009: 365-370 - [c3]Joo-Young Kim, Minsu Kim, Seungjin Lee, Jinwook Oh, Kwanho Kim, Sejong Oh, Jeong-Ho Woo, Donghyun Kim, Hoi-Jun Yoo:
A 201.4GOPS 496mW real-time multi-object recognition processor with bio-inspired neural perception engine. ISSCC 2009: 150-151 - 2008
- [c2]Kwanho Kim, Joo-Young Kim, Seungjin Lee, Minsu Kim, Hoi-Jun Yoo:
A 211 GOPS/W dual-mode real-time object recognition processor with Network-on-Chip. ESSCIRC 2008: 462-465 - [c1]Kwanho Kim, Seungjin Lee, Joo-Young Kim, Minsu Kim, Donghyun Kim, Jeong-Ho Woo, Hoi-Jun Yoo:
A 125GOPS 583mW Network-on-Chip Based Parallel Processor with Bio-inspired Visual-Attention Engine. ISSCC 2008: 308-309
Coauthor Index
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