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Kaizhen Han
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2020 – today
- 2023
- [c12]Kaizhen Han:
BEOL-compatible Oxide Semiconductor Devices. ICICDT 2023: xxi - [c11]Kaizhen Han, Yuye Kang, Yue Chen, Xiao Gong:
Novel Bridge Transmission Line Method for Thin-Film Semiconductors: Modelling, Simulation Verification, and Experimental Demonstration. VLSI Technology and Circuits 2023: 1-2 - [c10]Leming Jiao, Kaizhen Han, Zuopu Zhou, Zijie Zheng, Xiaolin Wang, Qiwen Kong, Yuye Kang, Jishen Zhang, Long Liu, Xiao Gong:
First Demonstration of BEOL-Compatible Write-Enhanced Ferroelectric-Modulated Diode (FMD): New Possibility for Oxide Semiconductor Memory Devices. VLSI Technology and Circuits 2023: 1-2 - [c9]Yuye Kang, Kaizhen Han, Yue Chen, Xiao Gong:
Thickness-Engineered Extremely-thin Channel High Performance ITO TFTs with Raised S/D Architecture: Record-Low RSD, Highest Moblity (Sub-4 nm TCH Regime), and High VTH Tunability. VLSI Technology and Circuits 2023: 1-2 - [c8]Xiaolin Wang, Zijie Zheng, Qiwen Kong, Leming Jiao, Kaizhen Han, Chen Sun, Zuopu Zhou, Long Liu, Yuye Kang, Gan Liu, Dong Zhang, Xiao Gong:
First Demonstration of BEOL-Compatible MFMIS Fe-FETs with 3D Multi-Fin Floating Gate: In-situ ALD-deposited MFM, LCH of 50 nm, > 2×109 Endurance, and 58.3% Area Saving. VLSI Technology and Circuits 2023: 1-2 - [c7]Dong Zhang, Jixuan Wu, Qiwen Kong, Zuopu Zhou, Long Liu, Kaizhen Han, Chen Sun, Xiaolin Wang, Gan Liu, Leming Jiao, Zijie Zheng, Yuye Kang, Jiezhi Chen, Xiao Gong:
Grain Size Reduction of Ferroelectric HZO Enabled by a Novel Solid Phase Epitaxy (SPE) Approach: Working Principle, Experimental Demonstration, and Theoretical Understanding. VLSI Technology and Circuits 2023: 1-2 - [c6]Zijie Zheng, Leming Jiao, Zuopu Zhou, Yuxuan Wang, Long Liu, Kaizhen Han, Chen Sun, Qiwen Kong, Dong Zhang, Xiaolin Wang, Kai Ni, Xiao Gong:
First Demonstration of Work Function-Engineered BEOL-Compatible IGZO Non-Volatile MFMIS AFeFETs and Their Co-Integration with Volatile-AFeFETs. VLSI Technology and Circuits 2023: 1-2 - [c5]Zuopu Zhou, Leming Jiao, Qiwen Kong, Zijie Zheng, Kaizhen Han, Yue Chen, Chen Sun, Bich-Yen Nguyen, Xiao Gong:
Non-Destructive-Read 1T1C Ferroelectric Capacitive Memory Cell with BEOL 3D Monolithically Integrated IGZO Access Transistor for 4F2 High-Density Integration. VLSI Technology and Circuits 2023: 1-2 - 2022
- [c4]Chengkuan Wang, Annie Kumar, Kaizhen Han, Chen Sun, Haiwen Xu, Jishen Zhang, Yuye Kang, Qiwen Kong, Zijie Zheng, Yuxuan Wang, Xiao Gong:
Extremely Scaled Bottom Gate a-IGZO Transistors Using a Novel Patterning Technique Achieving Record High Gm of 479.5 μS/μm (VDS of 1 V) and fT of 18.3 GHz (VDS of 3 V). VLSI Technology and Circuits 2022: 294-295 - [c3]Zuopu Zhou, Leming Jiao, Jiuren Zhou, Zijie Zheng, Yue Chen, Kaizhen Han, Yuye Kang, Xiao Gong:
Experimental Demonstration of An Inversion-Type Ferroelectric Capacitive Memory and its 1 kbit Crossbar Array Featuring High CHCS/CLCS, Fast Speed, and Long Retention. VLSI Technology and Circuits 2022: 357-358 - [c2]Haibo Wang, Gong Zhang, Yue Chen, Jishen Zhang, Kaizhen Han, Yi-Chiau Huang, Xiao Gong:
First Monolithic Integration of Group IV Waveguide Photodetectors and Modulators on 300 mm Si Substrates for 2-μm Wavelength Optoelectronic Integrated Circuit. VLSI Technology and Circuits 2022: 407-408
2010 – 2019
- 2019
- [c1]Chen Sun, Kaizhen Han, Xiao Gong:
Performance Evaluation of Static Random Access Memory (SRAM) based on Negative Capacitance FinFET. ICICDT 2019: 1-4
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