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Satvik Maurya
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2020 – today
- 2024
- [i5]Satvik Maurya, Chaithanya Naik Mude, Benjamin Lienhard, Swamit Tannu:
Understanding Side-Channel Vulnerabilities in Superconducting Qubit Readout Architectures. CoRR abs/2405.08962 (2024) - [i4]Chaithanya Naik Mude, Satvik Maurya, Benjamin Lienhard, Swamit Tannu:
Enabling Leakage Reduction via Fast and High-Fidelity Qutrit Readout. CoRR abs/2405.08982 (2024) - [i3]Satvik Maurya, Swamit Tannu:
Managing Classical Processing Requirements for Quantum Error Correction. CoRR abs/2406.17995 (2024) - 2023
- [c3]Satvik Maurya, Chaithanya Naik Mude, William D. Oliver, Benjamin Lienhard, Swamit S. Tannu:
Scaling Qubit Readout with Hardware Efficient Machine Learning Architectures. ISCA 2023: 7:1-7:13 - 2022
- [c2]Satvik Maurya, Swamit S. Tannu:
COMPAQT: Compressed Waveform Memory Architecture for Scalable Qubit Control. MICRO 2022: 1059-1077 - [i2]Satvik Maurya, Chaithanya Naik Mude, William D. Oliver, Benjamin Lienhard, Swamit S. Tannu:
Hardware Efficient Neural Network Assisted Qubit Readout. CoRR abs/2212.03895 (2022) - [i1]Satvik Maurya, Swamit S. Tannu:
COMPAQT: Compressed Waveform Memory Architecture for Scalable Qubit Control. CoRR abs/2212.03897 (2022)
2010 – 2019
- 2019
- [c1]Pranav Gangwar, Satvik Maurya, Shubham Garg, Sakshi Goyal, Aditya S. Kumar, Preyesh Dalmia, Neeta Pandey:
Hardware/Software Co-Design of a High-Speed Othello Solver. MWSCAS 2019: 1223-1226
Coauthor Index
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last updated on 2024-07-25 19:29 CEST by the dblp team
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