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2020 – today
- 2025
[j3]Kaiyan Chang, Wenlong Zhu, Kun Wang, Xinyang He, Nan Yang, Zhirong Chen, Dantong Jin, Cangyuan Li, Yunhao Zhou, Hao Yan, Zhuoliang Zhao, Yuan Cheng, Mengdi Wang, Shengwen Liang, Yinhe Han, Xiaowei Li, Huawei Li, Ying Wang:
A data-centric chip design agent framework for Verilog code generation. ACM Trans. Design Autom. Electr. Syst. 30(6): 93:1-93:27 (2025)- [j2]Cangyuan Li, Chujie Chen, Yudong Pan, Wenjun Xu, Yiqi Liu, Kaiyan Chang, Yujie Wang, Mengdi Wang, Huawei Li, Yinhe Han, Ying Wang:
AutoSilicon: Scaling Up RTL Design Generation Capability of Large Language Models. ACM Trans. Design Autom. Electr. Syst. 30(6): 97:1-97:21 (2025) - [c5]Kun Wang
, Kaiyan Chang, Mengdi Wang, Xingqi Zou, Haobo Xu, Yinhe Han, Ying Wang:
RTLMarker: Protecting LLM-Generated RTL Copyright via a Hardware Watermarking Framework. ASP-DAC 2025: 808-813 - [i14]Kun Wang, Kaiyan Chang, Mengdi Wang, Xinqi Zou, Haobo Xu, Yinhe Han, Ying Wang:
RTLMarker: Protecting LLM-Generated RTL Copyright via a Hardware Watermarking Framework. CoRR abs/2501.02446 (2025) - [i13]Kaiyan Chang, Mingzhi Chen, Yunji Chen, Zhirong Chen, Dongrui Fan, Junfeng Gong, Nan Guo, Yinhe Han, Qinfen Hao, Shuo Hou, Xuanjing Huang, Pengwei Jin, Changxin Ke, Cangyuan Li, Guangli Li, Huawei Li, Kuan Li, Naipeng Li, Shengwen Liang, Cheng Liu, Hongwei Liu, Jiahua Liu, Junliang Lv, Jianan Mu, Jin Qin, Bin Sun, Chenxi Wang, Duo Wang, Mingjun Wang, Ying Wang, Chenggang Wu, Peiyang Wu, Teng Wu, Xiao Xiao, Mengyao Xie, Chenwei Xiong, Ruiyuan Xu, Mingyu Yan, Xiaochun Ye, Kuai Yu, Rui Zhang, Shuoming Zhang, Jiacheng Zhao:
Large Processor Chip Model. CoRR abs/2506.02929 (2025) - [i12]Zhirong Chen, Kaiyan Chang, Zhuolin Li, Xinyang He, Chujie Chen, Cangyuan Li, Mengdi Wang, Haobo Xu, Yinhe Han, Ying Wang:
ChipSeek-R1: Generating Human-Surpassing RTL with LLM via Hierarchical Reward-Driven Reinforcement Learning. CoRR abs/2507.04736 (2025) - [i11]Kaiyan Chang, Yonghao Shi, Chenglong Wang, Hang Zhou, Chi Hu, Xiaoqian Liu, Yingfeng Luo, Yuan Ge, Tong Xiao, Jingbo Zhu:
Step-level Verifier-guided Hybrid Test-Time Scaling for Large Language Models. CoRR abs/2507.15512 (2025) - [i10]Yingfeng Luo, Dingyang Lin, Junxin Wang, Ziqiang Xu, Kaiyan Chang, Tong Zheng, Bei Li, Anxiang Ma, Tong Xiao, Zhengtao Yu, Jingbo Zhu:
One Size Does Not Fit All: A Distribution-Aware Sparsification for More Precise Model Merging. CoRR abs/2508.06163 (2025) - [i9]Kaiyan Chang, Wenlong Zhu, Shengwen Liang, Huawei Li, Ying Wang:
LLMulator: Generalizable Cost Modeling for Dataflow Accelerators with Input-Adaptive Control Flow. CoRR abs/2508.17826 (2025) - [i8]Jiaoyang Li, Junhao Ruan, Shengwei Tang, Saihan Chen, Kaiyan Chang, Yuan Ge, Tong Xiao, Jingbo Zhu:
SUBQRAG: Sub-Question Driven Dynamic Graph RAG. CoRR abs/2510.07718 (2025) - 2024
- [c4]Chenglong Wang, Hang Zhou, Kaiyan Chang, Bei Li, Yongyu Mu, Tong Xiao, Tongran Liu, JingBo Zhu:
Hybrid Alignment Training for Large Language Models. ACL (Findings) 2024: 11389-11403 - [c3]Kaiyan Chang, Kun Wang, Nan Yang, Ying Wang, Dantong Jin, Wenlong Zhu, Zhirong Chen, Cangyuan Li, Hao Yan, Yunhao Zhou, Zhuoliang Zhao, Yuan Cheng, Yudong Pan, Yiqi Liu, Mengdi Wang, Shengwen Liang, Yinhe Han, Huawei Li, Xiaowei Li:
Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework. DAC 2024: 60:1-60:6 - [c2]Kaiyan Chang, Zhirong Chen, Yunhao Zhou, Wenlong Zhu, Kun Wang, Haobo Xu, Cangyuan Li, Mengdi Wang, Shengwen Liang, Huawei Li, Yinhe Han, Ying Wang:
Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation. ICCAD 2024: 117:1-117:9 - [i7]Kaiyan Chang, Kun Wang, Nan Yang, Ying Wang, Dantong Jin, Wenlong Zhu, Zhirong Chen, Cangyuan Li, Hao Yan, Yunhao Zhou, Zhuoliang Zhao, Yuan Cheng, Yudong Pan, Yiqi Liu, Mengdi Wang, Shengwen Liang, Yinhe Han, Huawei Li, Xiaowei Li:
Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework. CoRR abs/2403.11202 (2024) - [i6]Kaiyan Chang, Songcheng Xu, Chenglong Wang, Yingfeng Luo, Tong Xiao, Jingbo Zhu:
Efficient Prompting Methods for Large Language Models: A Survey. CoRR abs/2404.01077 (2024) - [i5]Chenglong Wang, Hang Zhou, Kaiyan Chang, Bei Li, Yongyu Mu, Tong Xiao, Tongran Liu, Jingbo Zhu:
Hybrid Alignment Training for Large Language Models. CoRR abs/2406.15178 (2024) - [i4]Kaiyan Chang, Zhirong Chen, Yunhao Zhou, Wenlong Zhu, Kun Wang, Haobo Xu, Cangyuan Li, Mengdi Wang, Shengwen Liang, Huawei Li, Yinhe Han, Ying Wang:
Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation. CoRR abs/2407.08473 (2024) - 2023
- [c1]Yilun Zhao, Yu Chen, He Li, Ying Wang, Kaiyan Chang, Bingmeng Wang, Bing Li, Yinhe Han:
Full State Quantum Circuit Simulation Beyond Memory Limit. ICCAD 2023: 1-9 - [i3]Kaiyan Chang, Ying Wang, Haimeng Ren, Mengdi Wang, Shengwen Liang, Yinhe Han, Huawei Li, Xiaowei Li:
ChipGPT: How far are we from natural language hardware design. CoRR abs/2305.14019 (2023) - [i2]Chenglong Wang, Hang Zhou, Kaiyan Chang, Tongran Liu, Chunliang Zhang, Quan Du, Tong Xiao, Jingbo Zhu:
Learning Evaluation Models from Large Language Models for Sequence Generation. CoRR abs/2308.04386 (2023) - 2021
- [j1]Kaiyan Chang, Wei Jiang, Jinyu Zhan, Zicheng Gong, Weijia Pan:
ArchNet: A data hiding design for distributed machine learning systems. J. Syst. Archit. 114: 101912 (2021) - 2020
- [i1]Kaiyan Chang, Wei Jiang, Zicheng Gong, Xiangyu Wen, Zhiyuan He, Weijia Pan:
ArchNet: Data Hiding Model in Distributed Machine Learning System. CoRR abs/2004.10968 (2020)
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