Design of a Scalable Low-Power 1-Bit Hybrid Full Adder for Fast Computation.

Wed, 01 Jan 2020 00:00:00 +0100

Mehedi Hasan , Md. Jobayer Hossein, Mainul Hossain , Hasan U. Zaman , Sharnali Islam :
Design of a Scalable Low-Power 1-Bit Hybrid Full Adder for Fast Computation. IEEE Trans. Circuits Syst. II Express Briefs 67-II(8): 1464-1468 (2020)