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ORCIDPeter A. Beerel
Peter Anthony Beerel
2020 – today
- 2025
[c148]Sreetama Sarkar, Gourav Datta, Souvik Kundu, Kai Zheng, Chirayata Bhattacharyya, Peter A. Beerel:
MaskVD: Region Masking for Efficient Video Object Detection. WACV 2025: 1955-1964- [i67]Yue Hu, Rong Liu
, Meida Chen, Peter A. Beerel, Andrew Feng:
SplatMAP: Online Dense Monocular SLAM with 3D Gaussian Splatting. CoRR abs/2501.07015 (2025) - [i66]Sreetama Sarkar, Sumit Bam Shrestha, Yue Che, Leobardo Campos-Macias, Gourav Datta, Peter A. Beerel:
Region Masking to Accelerate Video Processing on Neuromorphic Hardware. CoRR abs/2503.16775 (2025) - 2024
- [j45]Yang Tang, Peter A. Beerel, Jürgen Kurths, Guanrong Chen:
Guest Editorial: Special Issue on Learning, Optimization, and Implementation for Circuits and Systems Driven by Artificial Intelligence. IEEE Trans. Circuits Syst. I Regul. Pap. 71(5): 1965-1968 (2024) - [c147]Zeyu Liu, Souvik Kundu, Anni Li, Junrui Wan, Lianghao Jiang, Peter A. Beerel:
AFLoRA: Adaptive Freezing of Low Rank Adaptation in Parameter Efficient Fine-Tuning of Large Models. ACL (Short Papers) 2024: 161-167 - [c146]Dake Chen, Shiduo Li, Yuke Zhang, Chenghao Li, Souvik Kundu, Peter A. Beerel:
DIA: Diffusion based Inverse Network Attack on Collaborative Inference. CVPR Workshops 2024: 124-130 - [c145]Sreetama Sarkar, Souvik Kundu, Peter A. Beerel:
RLNet: Robust Linearized Networks for Efficient Private Inference. CVPR Workshops 2024: 244-253 - [c144]Sreetama Sarkar, Souvik Kundu, Kai Zheng, Peter A. Beerel:
Block Selective Reprogramming for On-device Training of Vision Transformers. CVPR Workshops 2024: 8094-8103 - [c143]Md. Abdullah-Al Kaiser, Gourav Datta, Peter A. Beerel, Akhilesh R. Jaiswal:
Toward High-Accuracy, Programmable Extreme-Edge Intelligence for Neuromorphic Vision Sensors utilizing Magnetic Domain Wall Motion-based MTJ. DAC 2024: 81:1-81:6 - [c142]Sasan Razmkhah, Robert S. Aviles, Mingye Li, Sandeep Gupta, Peter A. Beerel, Massoud Pedram:
Challenges and Unexplored Frontiers in Electronic Design Automation for Superconducting Digital Logic. DATE 2024: 1-6 - [c141]Chenghao Li, Dake Chen, Yuke Zhang, Peter A. Beerel:
Mitigate Replication and Copying in Diffusion Models with Generalized Caption and Dual Fusion Enhancement. ICASSP 2024: 7230-7234 - [c140]Gourav Datta, Zeyu Liu, Peter A. Beerel:
Training Ultra-Low-Latency Spiking Neural Networks from Scratch. ICASSP 2024: 13046-13050 - [c139]Souvik Kundu, Rui-Jie Zhu, Akhilesh Jaiswal, Peter A. Beerel:
Recent Advances in Scalable Energy-Efficient and Trustworthy Spiking Neural Networks: from Algorithms to Technology. ICASSP 2024: 13256-13260 - [c138]Robert S. Aviles, Peter A. Beerel:
A Joint Optimization of Buffer and Splitter Insertion for Phase-Skipping Adiabatic Quantum - Flux - Parametron Circuits. ICCD 2024: 534-541 - [c137]Gourav Datta, Zeyu Liu, Peter Anthony Beerel:
Can we get the best of both Binary Neural Networks and Spiking Neural Networks for Efficient Computer Vision? ICLR 2024 - [c136]Zeyu Liu, Gourav Datta, Anni Li, Peter Anthony Beerel:
LMUFormer: Low Complexity Yet Powerful Spiking Model With Legendre Memory Units. ICLR 2024 - [c135]Xuan Zhou, Souvik Kundu, Dake Chen, Jie Huang, Peter A. Beerel:
What Makes Vision Transformers Robust Towards Bit-Flip Attack? ICPR (8) 2024: 424-438 - [c134]Sreetama Sarkar, Xinan Ye, Gourav Datta, Peter A. Beerel:
FixPix: Fixing Bad Pixels using Deep Learning. ICPR (3) 2024: 441-455 - [c133]Robert S. Aviles, Xi Li, Lei Lu, Zhaorui Ni, Peter A. Beerel:
An Efficient and Scalable Clocking Assignment Algorithm for Multi-Threaded Multi-Phase Single Flux Quantum Circuits. ISVLSI 2024: 266-271 - [c132]Xiao Fu, Yue Hu, Prashanth Sutrave, Peter A. Beerel, Barath Raghavan:
FireLoc: Low-latency Multi-modal Wildfire Geolocation. SenSys 2024: 1-14 - [c131]Yue Hu, Gourav Datta, Kira Beerel, Yao Liu, Peter A. Beerel:
Let's Roll: A Synthetic and Real Dataset for Pedestrian Detection Across Different Shutter Types. SiPS 2024: 113-118 - [i65]Robert S. Aviles, Xi Li, Lei Lu, Zhaorui Ni, Peter A. Beerel:
An Efficient and Scalable Clocking Assignment Algorithm for Multi-Threaded Multi-Phase Single Flux Quantum Circuits. CoRR abs/2401.06411 (2024) - [i64]Robert S. Aviles, Peter A. Beerel:
A Novel Optimization Algorithm for Buffer and Splitter Minimization in Phase-Skipping Adiabatic Quantum-Flux-Parametron Circuits. CoRR abs/2401.07393 (2024) - [i63]Zeyu Liu, Gourav Datta, Anni Li, Peter Anthony Beerel:
LMUFormer: Low Complexity Yet Powerful Spiking Model With Legendre Memory Units. CoRR abs/2402.04882 (2024) - [i62]Sreetama Sarkar, Souvik Kundu, Peter A. Beerel:
Linearizing Models for Efficient yet Robust Private Inference. CoRR abs/2402.05521 (2024) - [i61]Md. Abdullah-Al Kaiser, Gourav Datta, Peter A. Beerel, Akhilesh R. Jaiswal:
Toward High Performance, Programmable Extreme-Edge Intelligence for Neuromorphic Vision Sensors utilizing Magnetic Domain Wall Motion-based MTJ. CoRR abs/2402.15121 (2024) - [i60]Zeyu Liu, Souvik Kundu, Anni Li, Junrui Wan, Lianghao Jiang, Peter Anthony Beerel:
AFLoRA: Adaptive Freezing of Low Rank Adaptation in Parameter Efficient Fine-Tuning of Large Models. CoRR abs/2403.13269 (2024) - [i59]Sreetama Sarkar, Souvik Kundu, Kai Zheng, Peter A. Beerel:
Block Selective Reprogramming for On-device Training of Vision Transformers. CoRR abs/2405.10951 (2024) - [i58]Sreetama Sarkar, Gourav Datta, Souvik Kundu, Kai Zheng, Chirayata Bhattacharyya, Peter A. Beerel:
MaskVD: Region Masking for Efficient Video Object Detection. CoRR abs/2407.12067 (2024) - [i57]Robert S. Aviles, Phalgun G. K, Peter A. Beerel:
Delay Balancing with Clock-Follow-Data: Optimizing Area Delay Trade-offs for Robust Rapid Single Flux Quantum Circuits. CoRR abs/2409.04944 (2024) - [i56]Md. Abdullah-Al Kaiser, Sreetama Sarkar, Peter A. Beerel, Akhilesh R. Jaiswal, Gourav Datta:
Energy-Efficient & Real-Time Computer Vision with Intelligent Skipping via Reconfigurable CMOS Image Sensors. CoRR abs/2409.17341 (2024) - [i55]Md. Abdullah-Al Kaiser, Gourav Datta, Jordan Athas, Christian Duffee, Ajey P. Jacob, Pedram Khalili Amiri, Peter A. Beerel, Akhilesh R. Jaiswal:
Voltage-Controlled Magnetic Tunnel Junction based ADC-less Global Shutter Processing-in-Pixel for Extreme-Edge Intelligence. CoRR abs/2410.10592 (2024) - [i54]Jacob Huckelberry, Yuke Zhang, Allison Sansone, James Mickens, Peter A. Beerel, Vijay Janapa Reddi:
TinyML Security: Exploring Vulnerabilities in Resource-Constrained Machine Learning Systems. CoRR abs/2411.07114 (2024) - [i53]Chenghao Li, Yuke Zhang, Dake Chen, Jingqi Xu, Peter A. Beerel:
LoyalDiffusion: A Diffusion Model Guarding Against Data Replication. CoRR abs/2412.01118 (2024) - 2023
- [j44]Md. Abdullah-Al Kaiser, Gourav Datta, Zixu Wang, Ajey P. Jacob, Peter A. Beerel, Akhilesh R. Jaiswal:
Neuromorphic-P2M: processing-in-pixel-in-memory paradigm for neuromorphic image sensors. Frontiers Neuroinformatics 17 (2023) - [j43]Yinghua Hu, Yuke Zhang, Kaixin Yang, Dake Chen, Peter A. Beerel, Pierluigi Nuzzo:
On the Security of Sequential Logic Locking Against Oracle-Guided Attacks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 3628-3641 (2023) - [c130]Souvik Kundu, Yuke Zhang, Dake Chen, Peter A. Beerel:
Making Models Shallow Again: Jointly Learning to Reduce Non-Linearity and Depth for Latency-Efficient Private Inference. CVPR Workshops 2023: 4685-4689 - [c129]Yuke Zhang, Dake Chen, Souvik Kundu, Haomei Liu, Ruiheng Peng, Peter A. Beerel:
C2PI: An Efficient Crypto-Clear Two-Party Neural Network Private Inference. DAC 2023: 1-6 - [c128]Dake Chen, Christine Goins, Maxwell Waugaman, Georgios D. Dimou, Peter A. Beerel:
Island-based Random Dynamic Voltage Scaling vs ML-Enhanced Power Side-Channel Attacks. ACM Great Lakes Symposium on VLSI 2023: 333-338 - [c127]Md. Abdullah-Al Kaiser, Gourav Datta, Sreetama Sarkar, Souvik Kundu, Zihan Yin, Manas Garg, Ajey P. Jacob, Peter A. Beerel, Akhilesh R. Jaiswal:
Technology-Circuit-Algorithm Tri-Design for Processing-in-Pixel-in-Memory (P2M). ACM Great Lakes Symposium on VLSI 2023: 613-618 - [c126]Gourav Datta, Zeyu Liu, Md. Abdullah-Al Kaiser, Souvik Kundu, Joe Mathai, Zihan Yin, Ajey P. Jacob, Akhilesh R. Jaiswal, Peter A. Beerel:
In-Sensor & Neuromorphic Computing Are all You Need for Energy Efficient Computer Vision. ICASSP 2023: 1-5 - [c125]Souvik Kundu, Sairam Sundaresan, Sharath Nittur Sridhar, Shunlin Lu, Han Tang, Peter A. Beerel:
Sparse Mixture Once-for-all Adversarial Training for Efficient in-situ Trade-off between Accuracy and Robustness of DNNs. ICASSP 2023: 1-5 - [c124]Haonan Wang, Connor Imes, Souvik Kundu, Peter A. Beerel, Stephen P. Crago, John Paul Walters:
Quantpipe: Applying Adaptive Post-Training Quantization For Distributed Transformer Pipelines In Dynamic Edge Environments. ICASSP 2023: 1-5 - [c123]Dake Chen, Yuke Zhang, Souvik Kundu, Chenghao Li, Peter A. Beerel:
RNA-ViT: Reduced-Dimension Approximate Normalized Attention Vision Transformers for Latency Efficient Private Inference. ICCAD 2023: 1-9 - [c122]Yuke Zhang, Dake Chen, Souvik Kundu, Chenghao Li, Peter A. Beerel:
SAL-ViT: Towards Latency Efficient Private Inference on ViT using Selective Attention Search with a Learnable Softmax Approximation. ICCV 2023: 5093-5102 - [c121]Yue Hu, Xinan Ye, Yifei Liu, Souvik Kundu, Gourav Datta, Srikar Mutnuri, Namo Asavisanu, Nora Ayanian, Konstantinos Psounis, Peter A. Beerel:
FireFly: A Synthetic Dataset for Ember Detection in Wildfire. ICCV (Workshops) 2023: 3767-3771 - [c120]Souvik Kundu, Shunlin Lu, Yuke Zhang, Jacqueline Tiffany Liu, Peter A. Beerel:
Learning to Linearize Deep Neural Networks for Secure and Efficient Private Inference. ICLR 2023 - [c119]Zihan Yin, Gourav Datta, Md. Abdullah-Al Kaiser, Peter A. Beerel, Ajey P. Jacob, Akhilesh Jaiswal:
Design Considerations for 3D Heterogeneous Integration Driven Analog Processing-in-Pixel for Extreme-Edge Intelligence. ICRC 2023: 1-5 - [c118]Shashank Nag, Gourav Datta, Souvik Kundu, Nitin Chandrachoodan, Peter A. Beerel:
ViTA: A Vision Transformer Inference Accelerator for Edge Applications. ISCAS 2023: 1-5 - [c117]Gourav Datta, Haoqin Deng, Robert Aviles, Zeyu Liu, Peter A. Beerel:
Bridging the Gap Between Spiking Neural Networks & LSTMs for Latency & Energy Efficiency. ISLPED 2023: 1-6 - [c116]Dake Chen, Xuan Zhou, Yinghua Hu, Yuke Zhang, Kaixin Yang, Andrew Rittenbach, Pierluigi Nuzzo, Peter A. Beerel:
Unraveling Latch Locking Using Machine Learning, Boolean Analysis, and ILP. ISQED 2023: 1-8 - [c115]Souvik Kundu, Sairam Sundaresan, Massoud Pedram, Peter A. Beerel:
FLOAT: Fast Learnable Once-for-All Adversarial Training for Tunable Trade-off between Accuracy and Robustness. WACV 2023: 2348-2357 - [c114]Gourav Datta, Zeyu Liu, Zihan Yin, Linyu Sun, Akhilesh R. Jaiswal, Peter A. Beerel:
Enabling ISPless Low-Power Computer Vision. WACV 2023: 2429-2438 - [c113]Fang Chen, Gourav Datta, Souvik Kundu, Peter A. Beerel:
Self-Attentive Pooling for Efficient Deep Learning. WACV 2023: 3963-3972 - [i52]Souvik Kundu, Shunlin Lu, Yuke Zhang, Jacqueline Tiffany Liu, Peter A. Beerel:
Learning to Linearize Deep Neural Networks for Secure and Efficient Private Inference. CoRR abs/2301.09254 (2023) - [i51]Souvik Kundu, Sairam Sundaresan, Sharath Nittur Sridhar, Shunlin Lu, Han Tang, Peter A. Beerel:
Sparse Mixture Once-for-all Adversarial Training for Efficient In-Situ Trade-Off Between Accuracy and Robustness of DNNs. CoRR abs/2302.03523 (2023) - [i50]Shashank Nag, Gourav Datta, Souvik Kundu, Nitin Chandrachoodan, Peter A. Beerel:
ViTA: A Vision Transformer Inference Accelerator for Edge Applications. CoRR abs/2302.09108 (2023) - [i49]Md. Abdullah-Al Kaiser, Gourav Datta, Sreetama Sarkar, Souvik Kundu, Zihan Yin, Manas Garg, Ajey P. Jacob, Peter A. Beerel, Akhilesh R. Jaiswal:
Technology-Circuit-Algorithm Tri-Design for Processing-in-Pixel-in-Memory (P2M). CoRR abs/2304.02968 (2023) - [i48]Yuke Zhang, Dake Chen, Souvik Kundu, Haomei Liu, Ruiheng Peng, Peter A. Beerel:
C2PI: An Efficient Crypto-Clear Two-Party Neural Network Private Inference. CoRR abs/2304.13266 (2023) - [i47]Souvik Kundu, Yuke Zhang, Dake Chen, Peter A. Beerel:
Making Models Shallow Again: Jointly Learning to Reduce Non-Linearity and Depth for Latency-Efficient Private Inference. CoRR abs/2304.13274 (2023) - [i46]Dake Chen, Xuan Zhou, Yinghua Hu, Yuke Zhang, Kaixin Yang, Andrew Rittenbach, Pierluigi Nuzzo, Peter A. Beerel:
Unraveling Latch Locking Using Machine Learning, Boolean Analysis, and ILP. CoRR abs/2305.00107 (2023) - [i45]Dake Chen, Christine Goins, Maxwell Waugaman, Georgios D. Dimou, Peter A. Beerel:
Island-based Random Dynamic Voltage Scaling vs ML-Enhanced Power Side-Channel Attacks. CoRR abs/2306.04859 (2023) - [i44]Yue Hu, Xinan Ye, Yifei Liu, Souvik Kundu, Gourav Datta, Srikar Mutnuri, Namo Asavisanu, Nora Ayanian, Konstantinos Psounis, Peter A. Beerel:
FireFly A Synthetic Dataset for Ember Detection in Wildfire. CoRR abs/2308.03164 (2023) - [i43]Chenghao Li, Dake Chen, Yuke Zhang, Peter A. Beerel:
Mitigate Replication and Copying in Diffusion Models with Generalized Caption and Dual Fusion Enhancement. CoRR abs/2309.07254 (2023) - [i42]Yue Hu, Gourav Datta, Kira Beerel, Peter A. Beerel:
Let's Roll: Synthetic Dataset Analysis for Pedestrian Detection Across Different Shutter Types. CoRR abs/2309.08136 (2023) - [i41]Gourav Datta, Zeyu Liu, Anni Li, Peter A. Beerel:
Spiking Neural Networks with Dynamic Time Steps for Vision Transformers. CoRR abs/2311.16456 (2023) - [i40]Souvik Kundu, Rui-Jie Zhu, Akhilesh Jaiswal, Peter A. Beerel:
Recent Advances in Scalable Energy-Efficient and Trustworthy Spiking Neural networks: from Algorithms to Technology. CoRR abs/2312.01213 (2023) - [i39]Gourav Datta, Zeyu Liu, James Diffenderfer, Bhavya Kailkhura, Peter A. Beerel:
When Bio-Inspired Computing meets Deep Learning: Low-Latency, Accurate, & Energy-Efficient Spiking Neural Networks from Artificial Neural Networks. CoRR abs/2312.06900 (2023) - 2022
- [j42]Huimei Cheng, Xi Li, Yichen Gu, Peter A. Beerel:
Converting Flip-Flop to Clock-Gated 3-Phase Latch-Based Designs Using Graph-Based Retiming. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(4): 979-992 (2022) - [j41]Peter A. Beerel, Marios Georgiou, Ben Hamlin, Alex J. Malozemoff, Pierluigi Nuzzo:
Towards a Formal Treatment of Logic Locking. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2022(2): 92-114 (2022) - [j40]Souvik Kundu, Yao Fu, Bill Ye, Peter A. Beerel, Massoud Pedram:
Toward Adversary-aware Non-iterative Model Pruning through Dynamic Network Rewiring of DNNs. ACM Trans. Embed. Comput. Syst. 21(5): 52:1-52:24 (2022) - [c112]Souvik Kundu, Shikai Wang, Qirui Sun, Peter A. Beerel, Massoud Pedram:
BMPQ: Bit-Gradient Sensitivity-Driven Mixed-Precision Quantization of DNNs from Scratch. DATE 2022: 588-591 - [c111]Gourav Datta, Peter A. Beerel:
Can Deep Neural Networks be Converted to Ultra Low-Latency Spiking Neural Networks? DATE 2022: 718-723 - [c110]Yuke Zhang, Yinghua Hu, Pierluigi Nuzzo, Peter A. Beerel:
TriLock: IC Protection with Tunable Corruptibility and Resilience to SAT and Removal Attacks. DATE 2022: 1329-1334 - [c109]Yang Hu, Connor Imes, Xuanang Zhao, Souvik Kundu, Peter A. Beerel, Stephen P. Crago, John Paul Walters:
PipeEdge: Pipeline Parallelism for Large-Scale Model Inference on Heterogeneous Edge Devices. DSD 2022: 298-307 - [c108]Gourav Datta, Zihan Yin, Ajey P. Jacob, Akhilesh R. Jaiswal, Peter A. Beerel:
Towards Energy-Efficient Hyperspectral Image Processing Inside Camera Pixels. ECCV Workshops (6) 2022: 303-316 - [c107]Moisés Herrera, Peter A. Beerel:
Radiation Hardening by Design Techniques for the Mutual Exclusion Element. ACM Great Lakes Symposium on VLSI 2022: 267-273 - [c106]Xi Li, Min Pan, Tong Liu, Peter A. Beerel:
Multi-Phase Clocking for Multi-Threaded Gate-Level-Pipelined Superconductive Logic. ISVLSI 2022: 62-67 - [c105]Gourav Datta, Souvik Kundu, Zihan Yin, Joe Mathai, Zeyu Liu, Zixu Wang, Mulin Tian, Shunlin Lu, Ravi Teja Lakkireddy, Andrew G. Schmidt, Wael Abd-Almageed, Ajey P. Jacob, Akhilesh R. Jaiswal, Peter A. Beerel:
P2M-DeTrack: Processing-in-Pixel-in-Memory for Energy-efficient and Real-Time Multi-Object Detection and Tracking. VLSI-SoC 2022: 1-6 - [i38]Yuke Zhang, Yinghua Hu, Pierluigi Nuzzo, Peter A. Beerel:
TriLock: IC Protection with Tunable Corruptibility and Resilience to SAT and Removal Attacks. CoRR abs/2201.05943 (2022) - [i37]Gourav Datta, Souvik Kundu, Zihan Yin, Ravi Teja Lakkireddy, Joe Mathai, Ajey P. Jacob, Peter A. Beerel, Akhilesh R. Jaiswal:
P2M: A Processing-in-Pixel-in-Memory Paradigm for Resource-Constrained TinyML Applications. CoRR abs/2203.04737 (2022) - [i36]Gourav Datta, Zihan Yin, Ajey P. Jacob, Akhilesh R. Jaiswal, Peter A. Beerel:
Toward Efficient Hyperspectral Image Processing inside Camera Pixels. CoRR abs/2203.05696 (2022) - [i35]Souvik Kundu, Sairam Sundaresan, Massoud Pedram, Peter A. Beerel:
A Fast and Efficient Conditional Learning for Tunable Trade-Off between Accuracy and Robustness. CoRR abs/2204.00426 (2022) - [i34]Fang Chen, Gourav Datta, Souvik Kundu, Peter A. Beerel:
Self-Attentive Pooling for Efficient Deep Learning. CoRR abs/2209.07659 (2022) - [i33]Gourav Datta, Zeyu Liu, Zihan Yin, Linyu Sun, Akhilesh R. Jaiswal, Peter A. Beerel:
Enabling ISP-less Low-Power Computer Vision. CoRR abs/2210.05451 (2022) - [i32]Gourav Datta, Haoqin Deng, Robert Aviles, Peter A. Beerel:
Towards Energy-Efficient, Low-Latency and Accurate Spiking LSTMs. CoRR abs/2210.12613 (2022) - [i31]Haonan Wang, Connor Imes, Souvik Kundu, Peter A. Beerel, Stephen P. Crago, John Paul Walters:
QuantPipe: Applying Adaptive Post-Training Quantization for Distributed Transformer Pipelines in Dynamic Edge Environments. CoRR abs/2211.04515 (2022) - [i30]Gourav Datta, Zeyu Liu, Peter A. Beerel:
Hoyer regularizer is all you need for ultra low-latency spiking neural networks. CoRR abs/2212.10170 (2022) - [i29]Gourav Datta, Zeyu Liu, Md. Abdullah-Al Kaiser, Souvik Kundu, Joe Mathai, Zihan Yin, Ajey P. Jacob, Akhilesh R. Jaiswal, Peter A. Beerel:
In-Sensor & Neuromorphic Computing are all you need for Energy Efficient Computer Vision. CoRR abs/2212.10881 (2022) - [i28]Peter A. Beerel, Marios Georgiou, Ben Hamlin, Alex J. Malozemoff, Pierluigi Nuzzo:
Towards a Formal Treatment of Logic Locking. IACR Cryptol. ePrint Arch. 2022: 503 (2022) - 2021
- [j39]Sourya Dey, Sara Babakniya, Saikrishna C. Kanala, Marco Paolieri, Leana Golubchik, Peter A. Beerel, Keith M. Chugg:
Deep-n-Cheap: An Automated Efficient and Extensible Search Framework for Cost-Effective Deep Learning. SN Comput. Sci. 2(4): 265 (2021) - [j38]Gourav Datta, Yunkun Lin, Bo Zhang, Peter A. Beerel:
Metastability in Superconducting Single Flux Quantum (SFQ) Logic. IEEE Trans. Circuits Syst. I Regul. Pap. 68(5): 1990-2002 (2021) - [j37]Xi Li, Soheil Nazar Shahsavani, Xuan Zhou, Massoud Pedram, Peter A. Beerel:
A Variation-aware Hold Time Fixing Methodology for Single Flux Quantum Logic Circuits. ACM Trans. Design Autom. Electr. Syst. 26(6): 47:1-47:17 (2021) - [c104]Souvik Kundu, Mahdi Nazemi, Peter A. Beerel, Massoud Pedram:
DNR: A Tunable Robust Pruning Framework Through Dynamic Network Rewiring of DNNs. ASP-DAC 2021: 344-350 - [c103]Dake Chen, Chunxiao Lin, Peter A. Beerel:
GF-Flush: A GF(2) Algebraic Attack on Dynamically Secured Scan Chains. DFT 2021: 1-6 - [c102]Yinghua Hu, Yuke Zhang, Kaixin Yang, Dake Chen, Peter A. Beerel, Pierluigi Nuzzo:
Fun-SAT: Functional Corruptibility-Guided SAT-Based Attack on Sequential Logic Encryption. HOST 2021: 281-291 - [c101]Souvik Kundu, Massoud Pedram, Peter A. Beerel:
HIRE-SNN: Harnessing the Inherent Robustness of Energy-Efficient Deep Spiking Neural Networks by Training with Crafted Input Noise. ICCV 2021: 5189-5198 - [c100]Gourav Datta, Souvik Kundu, Peter A. Beerel:
Training Energy-Efficient Deep Spiking Neural Networks with Single-Spike Hybrid Input Encoding. IJCNN 2021: 1-8 - [c99]Souvik Kundu, Qirui Sun, Yao Fu, Massoud Pedram, Peter A. Beerel:
Analyzing the Confidentiality of Undistillable Teachers in Knowledge Distillation. NeurIPS 2021: 9181-9192 - [c98]Souvik Kundu, Gourav Datta, Massoud Pedram, Peter A. Beerel:
Spike-Thrift: Towards Energy-Efficient Deep Spiking Neural Networks by Limiting Spiking Activity via Attention-Guided Compression. WACV 2021: 3952-3961 - [i27]Dake Chen, Chunxiao Lin, Peter A. Beerel:
GF-Flush: A GF(2) Algebraic Attack on Secure Scan Chains. CoRR abs/2101.12279 (2021) - [i26]Gourav Datta, Souvik Kundu, Akhilesh R. Jaiswal, Peter A. Beerel:
HYPER-SNN: Towards Energy-efficient Quantized Deep Spiking Neural Networks for Hyperspectral Image Classification. CoRR abs/2107.11979 (2021) - [i25]Gourav Datta, Souvik Kundu, Peter A. Beerel:
Training Energy-Efficient Deep Spiking Neural Networks with Single-Spike Hybrid Input Encoding. CoRR abs/2107.12374 (2021) - [i24]Souvik Kundu, Gourav Datta, Massoud Pedram, Peter A. Beerel:
Towards Low-Latency Energy-Efficient Deep SNNs via Attention-Guided Compression. CoRR abs/2107.12445 (2021) - [i23]Yinghua Hu, Yuke Zhang, Kaixin Yang, Dake Chen, Peter A. Beerel, Pierluigi Nuzzo:
Fun-SAT: Functional Corruptibility-Guided SAT-Based Attack on Sequential Logic Encryption. CoRR abs/2108.04892 (2021) - [i22]Souvik Kundu, Massoud Pedram, Peter A. Beerel:
HIRE-SNN: Harnessing the Inherent Robustness of Energy-Efficient Deep Spiking Neural Networks by Training with Crafted Input Noise. CoRR abs/2110.11417 (2021) - [i21]Yang Hu, Connor Imes, Xuanang Zhao, Souvik Kundu, Peter A. Beerel, Stephen P. Crago, John Paul Walters:
Pipeline Parallelism for Inference on Heterogeneous Edge Computing. CoRR abs/2110.14895 (2021) - [i20]Gourav Datta, Peter A. Beerel:
Can Deep Neural Networks be Converted to Ultra Low-Latency Spiking Neural Networks? CoRR abs/2112.12133 (2021) - [i19]Souvik Kundu, Shikai Wang, Qirui Sun, Peter A. Beerel, Massoud Pedram:
BMPQ: Bit-Gradient Sensitivity Driven Mixed-Precision Quantization of DNNs from Scratch. CoRR abs/2112.13843 (2021) - 2020
- [j36]Souvik Kundu, Mahdi Nazemi, Massoud Pedram, Keith M. Chugg, Peter A. Beerel:
Pre-Defined Sparsity for Low-Complexity Convolutional Neural Networks. IEEE Trans. Computers 69(7): 1045-1058 (2020) - [j35]Sai Aparna Aketi, Smriti Gupta, Huimei Cheng, Joycee Mekie, Peter A. Beerel:
SERAD: Soft Error Resilient Asynchronous Design Using a Bundled Data Protocol. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. 67-I(5): 1667-1677 (2020) - [j34]Ramy N. Tadros, Peter A. Beerel:
A Theoretical Foundation for Timing Synchronous Systems Using Asynchronous Structures. ACM Trans. Design Autom. Electr. Syst. 25(2): 16:1-16:28 (2020) - [c97]Sourya Dey, Saikrishna C. Kanala, Keith M. Chugg, Peter A. Beerel:
Deep-n-Cheap: An Automated Search Framework for Low Complexity Deep Learning. ACML 2020: 273-288 - [c96]Jennifer Paykin, Brian Huffman, Daniel M. Zimmerman, Peter A. Beerel:
Formal Verification of Flow Equivalence in Desynchronized Designs. ASYNC 2020: 54-62 - [c95]Felipe A. Kuentzer, Moisés Herrera, Oliver Schrape, Peter A. Beerel, Milos Krstic:
Radiation Hardened Click Controllers for Soft Error Resilient Asynchronous Architectures. ASYNC 2020: 78-85 - [c94]Huimei Cheng, Xi Li, Yichen Gu, Peter A. Beerel:
Saving Power by Converting Flip-Flop to 3-Phase Latch-Based Designs. DATE 2020: 574-579 - [c93]Arnab Sanyal, Peter A. Beerel, Keith M. Chugg:
Neural Network Training with Approximate Logarithmic Computations. ICASSP 2020: 3122-3126 - [c92]Gourav Datta, Peter A. Beerel:
Modeling and Characterization of Metastability in Single Flux Quantum (SFQ) Synchronizers. ISCAS 2020: 1-5 - [i18]Sai Aparna Aketi, Smriti Gupta, Huimei Cheng, Joycee Mekie, Peter A. Beerel:
SERAD: Soft Error Resilient Asynchronous Design using a Bundled Data Protocol. CoRR abs/2001.04039 (2020) - [i17]Souvik Kundu, Mahdi Nazemi, Massoud Pedram, Keith M. Chugg, Peter A. Beerel:
Pre-defined Sparsity for Low-Complexity Convolutional Neural Networks. CoRR abs/2001.10710 (2020) - [i16]Souvik Kundu, Gourav Datta, Peter A. Beerel, Massoud Pedram:
qBSA: Logic Design of a 32-bit Block-Skewed RSFQ Arithmetic Logic Unit. CoRR abs/2001.10715 (2020) - [i15]Sourya Dey, Saikrishna C. Kanala, Keith M. Chugg, Peter A. Beerel:
Deep-n-Cheap: An Automated Search Framework for Low Complexity Deep Learning. CoRR abs/2004.00974 (2020) - [i14]Jennifer Paykin, Brian Huffman, Daniel M. Zimmerman, Peter A. Beerel:
Formal Verification of Flow Equivalence in Desynchronized Designs. CoRR abs/2004.10655 (2020) - [i13]Souvik Kundu, Mahdi Nazemi, Peter A. Beerel, Massoud Pedram:
A Tunable Robust Pruning Framework Through Dynamic Network Rewiring of DNNs. CoRR abs/2011.03083 (2020)
2010 – 2019
- 2019
- [j33]Sourya Dey, Kuan-Wen Huang, Peter A. Beerel, Keith M. Chugg:
Pre-Defined Sparse Neural Networks With Hardware Acceleration. IEEE J. Emerg. Sel. Topics Circuits Syst. 9(2): 332-345 (2019) - [j32]Yang Zhang, Ji Li, Huimei Cheng, Haipeng Zha, Jeffrey Draper, Peter A. Beerel:
Yield modelling and analysis of bundled data and ring-oscillator based designs. IET Comput. Digit. Tech. 13(3): 262-272 (2019) - [j31]Huimei Cheng, Hsiao-Lun Wang, Minghe Zhang, Dylan Hand, Peter A. Beerel:
Automatic Retiming of Two-Phase Latch-Based Resilient Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(7): 1305-1316 (2019) - [c91]Souvik Kundu, Saurav Prakash, Haleh Akrami, Peter A. Beerel, Keith M. Chugg:
pSConv: A Pre-defined S parse Kernel Based Convolution for Deep CNNs. Allerton 2019: 100-107 - [c90]Arash Fayyazi, Souvik Kundu, Shahin Nazarian, Peter A. Beerel, Massoud Pedram:
CSrram: Area-Efficient Low-Power Ex-Situ Training Framework for Memristive Neuromorphic Circuits Based on Clustered Sparsity. ISVLSI 2019: 465-470 - [c89]Vivek V. Menon, Gaurav Kolhe, Andrew G. Schmidt, Joshua S. Monson, Matthew French, Yinghua Hu, Peter A. Beerel, Pierluigi Nuzzo:
System-Level Framework for Logic Obfuscation with Quantified Metrics for Evaluation. SecDev 2019: 89-100 - [i12]Huimei Cheng, Yichen Gu, Peter A. Beerel:
Automatic Conversion from Flip-flop to 3-phase Latch-based Designs. CoRR abs/1906.10666 (2019) - [i11]Souvik Kundu, Saurav Prakash, Haleh Akrami, Peter A. Beerel, Keith M. Chugg:
A Pre-defined Sparse Kernel Based Convolution for Deep CNNs. CoRR abs/1910.00724 (2019) - [i10]Gourav Datta, Haolin Cong, Souvik Kundu, Peter A. Beerel:
Metastability-Resilient Synchronization FIFO for SFQ Logic. CoRR abs/1910.04907 (2019) - [i9]Arnab Sanyal, Peter A. Beerel, Keith M. Chugg:
Neural Network Training with Approximate Logarithmic Computations. CoRR abs/1910.09876 (2019) - [i8]Tomohiro Yoneda, Peter A. Beerel, Alex Yakovlev, Masashi Imai:
Asynchronous Circuit Design and its Applications: Past, Present and Future (NII Shonan Meeting 133). NII Shonan Meet. Rep. 2019 (2019) - 2018
- [j30]Hsin-Ho Huang, Huimei Cheng, Chris Chu, Peter A. Beerel:
Area Optimization of Timing Resilient Designs Using Resynthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(6): 1197-1210 (2018) - [j29]Matheus T. Moreira, Peter A. Beerel, Marcos L. L. Sartori, Ney Laert Vilar Calazans:
NCL Synthesis With Conventional EDA Tools: Technology Mapping and Optimization. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(6): 1981-1993 (2018) - [c88]Yang Zhang, Huimei Cheng, Dake Chen, Huayu Fu, Shikhanshu Agarwal, Mark Lin, Peter A. Beerel:
Challenges in Building an Open-Source Flow from RTL to Bundled-Data Design. ASYNC 2018: 26-27 - [c87]Sourya Dey, Keith M. Chugg, Peter A. Beerel:
Morse Code Datasets for Machine Learning. ICCCNT 2018: 1-7 - [c86]Peter A. Beerel, Massoud Pedram:
Opportunities for Machine Learning in Electronic Design Automation. ISCAS 2018: 1-5 - [c85]Ramy N. Tadros, Peter A. Beerel:
A Robust and Self-Adaptive Clocking Technique for RSFQ Circuits - The Architecture. ISCAS 2018: 1-5 - [c84]Sourya Dey, Kuan-Wen Huang, Peter A. Beerel, Keith M. Chugg:
Characterizing Sparse Connectivity Patterns in Neural Networks. ITA 2018: 1-9 - [c83]Moisés Herrera, Tingyu Wang, Peter A. Beerel:
Blade-OC Asynchronous Resilient Template ‡ This research has been supported in part by NSF Grant #1619415. PATMOS 2018: 147-154 - [c82]Sourya Dey, Diandian Chen, Zongyang Li, Souvik Kundu, Kuan-Wen Huang, Keith M. Chugg, Peter A. Beerel:
A Highly Parallel FPGA Implementation of Sparse Neural Network Training. ReConFig 2018: 1-4 - [i7]Sourya Dey, Diandian Chen, Zongyang Li, Souvik Kundu, Kuan-Wen Huang, Keith M. Chugg, Peter A. Beerel:
A Highly Parallel FPGA Implementation of Sparse Neural Network Training. CoRR abs/1806.01087 (2018) - [i6]Sourya Dey, Keith M. Chugg, Peter A. Beerel:
Morse Code Datasets for Machine Learning. CoRR abs/1807.04239 (2018) - [i5]Arash Fayyazi, Souvik Kundu, Shahin Nazarian, Peter A. Beerel, Massoud Pedram:
SpRRAM: A Predefined Sparsity Based Memristive Neuromorphic Circuit for Low Power Application. CoRR abs/1809.03476 (2018) - [i4]Sourya Dey, Kuan-Wen Huang, Peter A. Beerel, Keith M. Chugg:
Pre-Defined Sparse Neural Networks with Hardware Acceleration. CoRR abs/1812.01164 (2018) - 2017
- [j28]Arash Saifhashemi, Hsin-Ho Huang, Peter A. Beerel:
Reconditioning: A Framework for Automatic Power Optimization of QDI Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(2): 265-278 (2017) - [c81]Sourya Dey, Peter A. Beerel, Keith M. Chugg:
Interleaver design for deep neural networks. ACSSC 2017: 1979-1983 - [c80]Yang Zhang, Haipeng Zha, Vaishnavi Sahir, Huimei Cheng, Peter A. Beerel:
Test Margin and Yield in Bundled Data and Ring-Oscillator Based Designs. ASYNC 2017: 85-93 - [c79]Hsiao-Lun Wang, Minghe Zhang, Peter A. Beerel:
Retiming of Two-Phase Latch-Based Resilient Circuits. DAC 2017: 70:1-70:6 - [c78]Sourya Dey, Yinan Shao, Keith M. Chugg, Peter A. Beerel:
Accelerating Training of Deep Neural Networks via Sparse Edge Processing. ICANN (1) 2017: 273-280 - [i3]Sourya Dey, Yinan Shao, Keith M. Chugg, Peter A. Beerel:
Accelerating Training of Deep Neural Networks via Sparse Edge Processing. CoRR abs/1711.01343 (2017) - [i2]Sourya Dey, Kuan-Wen Huang, Peter A. Beerel, Keith M. Chugg:
Characterizing Sparse Connectivity Patterns in Neural Networks. CoRR abs/1711.02131 (2017) - [i1]Sourya Dey, Peter A. Beerel, Keith M. Chugg:
Interleaver Design for Deep Neural Networks. CoRR abs/1711.06935 (2017) - 2016
- [j27]Ajay Singhvi, Matheus T. Moreira, Ramy N. Tadros, Ney Laert Vilar Calazans, Peter A. Beerel:
A Fine-Grain, Uniform, Energy-Efficient Delay Element for 2-Phase Bundled-Data Circuits. ACM J. Emerg. Technol. Comput. Syst. 13(2): 15:1-15:23 (2016) - [j26]Yang Zhang, Leandro S. Heck, Matheus T. Moreira, David Zar, Melvin A. Breuer, Ney Laert Vilar Calazans, Peter A. Beerel:
Testable MUTEX Design. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(8): 1188-1199 (2016) - [j25]Ramy N. Tadros, Weizhe Hua, Matheus T. Moreira, Ney Laert Vilar Calazans, Peter A. Beerel:
A Low-Power Low-Area Error-Detecting Latch for Resilient Architectures in 28-nm FDSOI. IEEE Trans. Circuits Syst. II Express Briefs 63-II(9): 858-862 (2016) - [c77]Ramy N. Tadros, Weizhe Hua, Matheus Gibiluka, Matheus T. Moreira, Ney Laert Vilar Calazans, Peter A. Beerel:
Analysis and Design of Delay Lines for Dynamic Voltage Scaling Applications. ASYNC 2016: 11-18 - [c76]Hsin-Ho Huang, Huimei Cheng, Chris C. N. Chu, Peter A. Beerel:
Area optimization of resilient designs guided by a mixed integer geometric program. DAC 2016: 130:1-130:6 - [c75]Weizhe Hua, Ramy N. Tadros, Peter A. Beerel:
Low Area, Low Power, Robust, Highly Sensitive Error Detecting Latch for Resilient Architectures. ISLPED 2016: 16-21 - 2015
- [c74]Dylan Hand, Matheus Trevisan Moreira, Hsin-Ho Huang, Danlei Chen, Frederico Butzke, Zhichao Li, Matheus Gibiluka, Melvin A. Breuer, Ney Laert Vilar Calazans, Peter A. Beerel:
Blade - A Timing Violation Resilient Asynchronous Template. ASYNC 2015: 21-28 - [c73]Dylan Hand, Hsin-Ho Huang, Benmao Cheng, Yang Zhang, Matheus Trevisan Moreira, Melvin A. Breuer, Ney Laert Vilar Calazans, Peter A. Beerel:
Performance Optimization and Analysis of Blade Designs under Delay Variability. ASYNC 2015: 61-68 - [c72]Yang Zhang, Leandro S. Heck, Matheus T. Moreira, David Zar, Melvin A. Breuer, Ney Laert Vilar Calazans, Peter A. Beerel:
Design and Analysis of Testable Mutual Exclusion Elements. ASYNC 2015: 124-131 - [c71]Arash Saifhashemi, Hsin-Ho Huang, Priyanka Bhalerao, Peter A. Beerel:
Logical equivalence checking of asynchronous circuits using commercial tools. DATE 2015: 1563-1566 - [c70]Peter A. Beerel, Ney Laert Vilar Calazans:
A path towards average-case silicon via asynchronous resilient bundled-data design. ECCTD 2015: 1-4 - [c69]Matheus T. Moreira, Dylan Hand, Peter A. Beerel, Ney Laert Vilar Calazans:
TDTB error detecting latches: Timing violation sensitivity analysis and optimization. ISQED 2015: 379-383 - [c68]Ajay Singhvi, Matheus T. Moreira, Ramy N. Tadros, Ney Laert Vilar Calazans, Peter A. Beerel:
A Fine-Grained, Uniform, Energy-Efficient Delay Element for FD-SOI Technologies. ISVLSI 2015: 27-32 - [c67]Guilherme Heck, Leandro S. Heck, Ajay Singhvi, Matheus T. Moreira, Peter A. Beerel, Ney Laert Vilar Calazans:
Analysis and Optimization of Programmable Delay Elements for 2-Phase Bundled-Data Circuits. VLSID 2015: 321-326 - 2014
- [j24]Georgios D. Dimou, Peter A. Beerel, Andrew Lines:
Performance-Driven Clustering of Asynchronous Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(2): 197-209 (2014) - [j23]Pankaj Golani, Peter A. Beerel:
Area-Efficient Asynchronous Multilevel Single-Track Pipeline Template. IEEE Trans. Very Large Scale Integr. Syst. 22(4): 838-849 (2014) - [c66]Mehrdad Najibi, Peter A. Beerel:
Integrated Fanout Optimization and Slack Matching of Asynchronous Circuits. ASYNC 2014: 69-76 - [c65]Arash Saifhashemi, Hsin-Ho Huang, Peter A. Beerel:
Reconditioning: Automatic Power Optimization of QDI Circuits. ASYNC 2014: 77-84 - [c64]Mike Davies, Andrew Lines, Jon Dama, Alain Gravel, Robert Southworth, Georgios D. Dimou, Peter A. Beerel:
A 72-Port 10G Ethernet Switch/Router Using Quasi-Delay-Insensitive Asynchronous Design. ASYNC 2014: 103-104 - [c63]Arash Saifhashemi, Dylan Hand, Peter A. Beerel, William Koven, Hong Wang:
Performance and Area Optimization of a Bundled-Data Intel Processor through Resynthesis. ASYNC 2014: 110-111 - [c62]Guowei Zhang, Peter A. Beerel:
Stochastic analysis of Bubble Razor. DATE 2014: 1-6 - [c61]Gang Wu, Tao Lin, Hsin-Ho Huang, Chris Chu, Peter A. Beerel:
Asynchronous circuit placement by lagrangian relaxation. ICCAD 2014: 641-646 - 2013
- [c60]Mehrdad Najibi, Peter A. Beerel:
Deriving Performance Bounds for Conditional Asynchronous Circuits Using Linear Programing. ASYNC 2013: 75-82 - [c59]Mehrdad Najibi, Peter A. Beerel:
Slack matching mode-based asynchronous circuits for average-case performance. ICCAD 2013: 219-225 - 2012
- [c58]Mehrdad Najibi, Peter A. Beerel:
Performance Bounds of Asynchronous Circuits with Mode-Based Conditional Behavior. ASYNC 2012: 9-16 - [c57]Pavlos M. Mattheakis, Christos P. Sotiriou, Peter A. Beerel:
A polynomial time flow for implementing free-choice Petri-nets. ICCD 2012: 227-234 - [c56]Arash Saifhashemi, Peter A. Beerel:
Observability Conditions and Automatic Operand-Isolation in High-Throughput Asynchronous Pipelines. PATMOS 2012: 205-214 - 2011
- [j22]Peter A. Beerel, Georgios D. Dimou, Andrew Lines:
Proteus: An ASIC Flow for GHz Asynchronous Designs. IEEE Des. Test Comput. 28(5): 36-51 (2011) - [j21]Kenneth S. Stevens, Pankaj Golani, Peter A. Beerel:
Energy and Performance Models for Synchronous and Asynchronous Communication. IEEE Trans. Very Large Scale Integr. Syst. 19(3): 369-382 (2011) - [c55]Pankaj Golani, Peter A. Beerel:
An area-efficient multi-level single-track pipeline template. DATE 2011: 1509-1512 - [c54]Georgios D. Dimou, Peter A. Beerel, Andrew Lines:
Performance-Driven Clustering of Asynchronous Circuits. PATMOS 2011: 92-101 - [c53]Arash Saifhashemi, Peter A. Beerel:
SystemVerilogCSP: Modeling Digital Asynchronous Circuits Using SystemVerilog Interfaces. CPA 2011: 287-302 - 2010
- [c52]Prasad Joshi, Peter A. Beerel, Marly Roncken, Ivan E. Sutherland:
Timing Verification of GasP Asynchronous Circuits: Predicted Delay Variations Observed by Experiment. Concurrency, Compositionality, and Correctness 2010: 260-276
2000 – 2009
- 2009
- [c51]Ritej Bachhawat, Pankaj Golani, Peter A. Beerel:
Crosstalk in High-Performance Asynchronous Designs. PATMOS 2009: 136-145 - 2007
- [j20]Peter A. Beerel, Marly Roncken:
Low Power and Energy Efficient Asynchronous Design. J. Low Power Electron. 3(3): 234-253 (2007) - [c50]Pankaj Golani, Georgios D. Dimou, Mallika Prakash, Peter A. Beerel:
Design of a High-Speed Asynchronous Turbo Decoder. ASYNC 2007: 49-59 - 2006
- [j19]Pankaj Golani, Peter A. Beerel:
Back-Annotation in High-Speed Asynchronous Design. J. Low Power Electron. 2(1): 37-44 (2006) - [j18]Marcos Ferretti, Peter A. Beerel:
High performance asynchronous design using single-track full-buffer standard cells. IEEE J. Solid State Circuits 41(6): 1444-1454 (2006) - [j17]Sangyun Kim, Peter A. Beerel:
Pipeline optimization for asynchronous circuits: complexity analysis and an efficient optimal algorithm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(3): 389-402 (2006) - [j16]Recep O. Ozdag, Peter A. Beerel:
An Asynchronous Low-Power High-Performance Sequential Decoder Implemented With QDI Templates. IEEE Trans. Very Large Scale Integr. Syst. 14(9): 975-985 (2006) - [c49]Sunan Tugsinavisut, Roger Su, Peter A. Beerel:
High-level Synthesis for Highly Concurrent Hardware Systems. ACSD 2006: 79-90 - [c48]Peter A. Beerel, Nam-Hoon Kim, Andrew Lines, Mike Davies:
Slack Matching Asynchronous Designs. ASYNC 2006: 184-194 - [c47]Pankaj Golani, Peter A. Beerel:
High-Performance Noise-Robust Asynchronous Circuits. ISVLSI 2006: 173-178 - [c46]Peter A. Beerel:
Asynchronous Design for High-Speed and Low-Power Circuits. PATMOS 2006: 669 - 2005
- [j15]Sunan Tugsinavisut, Youpyo Hong, Daewook Kim, Kyeounsoo Kim, Peter A. Beerel:
Efficient asynchronous bundled-data pipelines for DCT matrix-vector multiplication. IEEE Trans. Very Large Scale Integr. Syst. 13(4): 448-461 (2005) - [c45]Pankaj Golani, Peter A. Beerel:
Back Annotation in High Speed Asynchronous Design. PATMOS 2005: 227-236 - [c44]Arash Saifhashemi, Peter A. Beerel:
High Level Modeling of Channel-Based Asynchronous Circuits Using Verilog. CPA 2005: 275-288 - 2004
- [c43]Marcos Ferretti, Recep O. Ozdag, Peter A. Beerel:
High Performance Asynchronous ASIC Back-End Design Flow Using Single-Track Full-Buffer Standard Cells. ASYNC 2004: 95-105 - [c42]Recep O. Ozdag, Peter A. Beerel:
A Channel Based Asynchronous Low Power High Performance Standard-Cell Based Sequential Decoder Implemented with QDI Templates. ASYNC 2004: 187-197 - [c41]Nam-Hoon Kim, Peter A. Beerel, Ralph Peng:
A memory allocation and assignment method using multiway partitioning. SoCC 2004: 143-144 - [c40]Peter A. Beerel, Jordi Cortadella, Alex Kondratyev:
Bridging the Gap between Asynchronous Design and Designers. VLSI Design 2004: 18-20 - 2003
- [j14]Joong-Seok Moon, William C. Athas, Sigfrid D. Soli, Jeffrey T. Draper, Peter A. Beerel:
Voltage-pulse driven harmonic resonant rail drivers for low-power applications. IEEE Trans. Very Large Scale Integr. Syst. 11(5): 762-777 (2003) - [c39]Sunan Tugsinavisut, Suwicha Jirayucharoensak, Peter A. Beerel:
An asynchronous pipeline comparisons with application to DCT matrix-vector multiplication. ISCAS (5) 2003: 361-364 - 2002
- [c38]Peter A. Beerel, Aiguo Xie:
Performance Analysis of Asynchronous Circuits Using Markov Chains. Concurrency and Hardware Design 2002: 313-344 - [c37]Recep O. Ozdag, Peter A. Beerel:
High-Speed QDI Asynchronous Pipelines. ASYNC 2002: 13-22 - [c36]Peter A. Beerel, Ken S. Stevens, Hoshik Kim:
Relative Timing Based Verification of Timed Circuits and Systems. ASYNC 2002: 115-124 - [c35]Joong-Seok Moon, William C. Athas, Peter A. Beerel, Jeffrey T. Draper:
Low-power sequential access memory design. CICC 2002: 111-114 - [c34]Recep O. Ozdag, Peter A. Beerel, Montek Singh, Steven M. Nowick:
High-Speed Non-Linear Asynchronous Pipelines. DATE 2002: 1000-1007 - [c33]Marcos Ferretti, Peter A. Beerel:
Single-Track Asynchronous Pipeline Templates Using 1-of-N Encoding. DATE 2002: 1008-1015 - [c32]Sunan Tugsinavisut, Peter A. Beerel:
Control Circuit Templates for Asynchronous Bundled-Data Pipelines. DATE 2002: 1098 - [c31]Peter A. Beerel:
Asynchronous Circuits: An Increasingly Practical Design Solution (invited). ISQED 2002: 367-372 - [c30]Sangyun Kim, Sunan Tugsinavisut, Peter A. Beerel:
Reducing probabilistic timed petri nets for asynchronous architectural analysis. Timing Issues in the Specification and Synthesis of Digital Systems 2002: 140-147 - 2001
- [j13]Peter A. Beerel, Keith M. Chugg:
A low latency SISO with application to broadband turbo decoding. IEEE J. Sel. Areas Commun. 19(5): 860-870 (2001) - [j12]Kenneth S. Stevens, Shai Rotem, Ran Ginosar, Peter A. Beerel, Chris J. Myers, Kenneth Y. Yun, Rakefet Kol, Charles Dike, Marly Roncken:
An asynchronous instruction length decoder. IEEE J. Solid State Circuits 36(2): 217-228 (2001) - [c29]Joong-Seok Moon, William C. Athas, Peter A. Beerel:
Theory and practical implementation of harmonic resonant rail driver. ISLPED 2001: 153-158 - 2000
- [j11]Youpyo Hong, Peter A. Beerel, Jerry R. Burch, Kenneth L. McMillan:
Sibling-substitution-based BDD minimization using don't cares. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(1): 44-55 (2000) - [j10]Aiguo Xie, Peter A. Beerel:
Implicit enumeration of strongly connected components and anapplication to formal verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(10): 1225-1230 (2000) - [c28]Sangyun Kim, Peter A. Beerel:
Pipeline Optimization for Asynchronous Circuits: Complexity Analysis and an Efficient Optimal Algorithm. ICCAD 2000: 296-302 - [c27]Kyeounsoo Kim, Peter A. Beerel, Youpyo Hong:
An asynchronous matrix-vector multiplier for discrete cosine transform. ISLPED 2000: 256-261
1990 – 1999
- 1999
- [j9]Aiguo Xie, Peter A. Beerel:
Accelerating Markovian analysis of asynchronous systems using state compression. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(7): 869-888 (1999) - [j8]Wei-Chun Chou, Peter A. Beerel, Kenneth Y. Yun:
Average-case technology mapping of asynchronous burst-mode circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(10): 1418-1434 (1999) - [c26]Shai Rotem, Ken S. Stevens, Charles Dike, Marly Roncken, Boris Agapiev, Ran Ginosar, Rakefet Kol, Peter A. Beerel, Chris J. Myers, Kenneth Y. Yun:
RAPPID: An Asynchronous Instruction Length Decoder. ASYNC 1999: 60-70 - [c25]Aiguo Xie, Sangyun Kim, Peter A. Beerel:
Bounding Average Time Separations of Events in Stochastic Timed Petri Nets with Choice. ASYNC 1999: 94-107 - [c24]Hüsnü Yenigün, Vladimir Levin, Doron A. Peled, Peter A. Beerel:
Hazard-Freedom Checking in Speed-Independent Systems. CHARME 1999: 317-320 - [c23]Youpyo Hong, Peter A. Beerel:
Symbolic Reachability Analysis of Large Finite State Machines Using Don't Cares. DATE 1999: 13- - [c22]Aiguo Xie, Peter A. Beerel:
Implicit enumeration of strongly connected components. ICCAD 1999: 37-40 - [c21]Peter A. Beerel, Sangyun Kim, Pei-Chuan Yeh, Kyeounsoo Kim:
Statistically optimized asynchronous barrel shifters for variable length codecs. ISLPED 1999: 261-263 - 1998
- [j7]Peter A. Beerel, Jerry R. Burch, Teresa H. Meng:
Checking Combinational Equivalence of Speed-Independent Circuits. Formal Methods Syst. Des. 13(1): 37-85 (1998) - [j6]Peter A. Beerel, Chris J. Myers, Teresa H. Meng:
Covering conditions and algorithms for the synthesis of speed-independent circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(3): 205-219 (1998) - [j5]Aiguo Xie, Peter A. Beerel:
Efficient state classification of finite-state Markov chains. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(12): 1334-1339 (1998) - [j4]Kenneth Y. Yun, Peter A. Beerel, Vida Vakilotojar, Ayoob E. Dooply, Julio Arceo:
The design and verification of a high-performance low-control-overhead asynchronous differential equation solver. IEEE Trans. Very Large Scale Integr. Syst. 6(4): 643-655 (1998) - [c20]Wei-Chun Chou, Peter A. Beerel, Ran Ginosar, Rakefet Kol, Chris J. Myers, Shai Rotem, Ken S. Stevens, Kenneth Y. Yun:
Average-Case Optimized Technology Mapping of One-Hot Domino CircuitsAverage-Case Optimized Transistor-Level Technology Mapping of Extended Burst-Mode Circuits. ASYNC 1998: 80- - [c19]Aiguo Xie, Peter A. Beerel:
Accelerating Markovian Analysis of Asynchronous Systems using String- based State Compression. ASYNC 1998: 247- - [c18]Youpyo Hong, Peter A. Beerel, Luciano Lavagno, Ellen Sentovich:
Don't Care-Based BDD Minimization for Embedded Software. DAC 1998: 506-509 - [c17]Aiguo Xie, Peter A. Beerel:
Efficient State Classification of Finite State Markov Chains. DAC 1998: 605-610 - [c16]Timothy Mark Pinkston, Peter A. Beerel:
Computer engineering using innovative instructional technologies at the University of Southern California. WCAE@ISCA 1998: 27 - 1997
- [j3]Vida Vakilotojar, Peter A. Beerel:
RTL verification of timed asynchronous and heterogeneous systems using symbolic model checking. Integr. 24(1): 19-35 (1997) - [c15]Vida Vakilotojar, Peter A. Beerel:
RTL verification of timed asynchronous and heterogeneous systems using symbolic model checking. ASP-DAC 1997: 181-188 - [c14]Aiguo Xie, Peter A. Beerel:
Symbolic Techniques for Performance Analysis of Timed Systems Based on Average Time Separation of Events. ASYNC 1997: 64-75 - [c13]Kenneth Y. Yun, Ayoob E. Dooply, Julio Arceo, Peter A. Beerel, Vida Vakilotojar:
The Design and Verification of A High-Performance Low-Control-Overhead Asynchronous Differential Equation Solver. ASYNC 1997: 140- - [c12]Steven M. Nowick, Kenneth Y. Yun, Ayoob E. Dooply, Peter A. Beerel:
Speculative Completion for the Design of High-Performance Asynchronous Dynamic Adders. ASYNC 1997: 210- - [c11]Youpyo Hong, Peter A. Beerel, Jerry R. Burch, Kenneth L. McMillan:
Safe BDD Minimization Using Don't Cares. DAC 1997: 208-213 - 1996
- [j2]Peter A. Beerel, Cheng-Ta Hsieh, Suhrid A. Wadekar:
Estimation of energy consumption in speed-independent control circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(6): 672-680 (1996) - [c10]Kenneth Y. Yun, Peter A. Beerel, Julio Arceo:
High-performance asynchronous pipeline circuits. ASYNC 1996: 17-28 - [c9]Peter A. Beerel, Kenneth Y. Yun, Wei-Chun Chou:
Optimizing average-case delay in technology mapping of burst-mode circuits. ASYNC 1996: 244-260 - [c8]Peter A. Beerel, Wei-Chun Chou, Kenneth Y. Yun:
A heuristic covering technique for optimizing average-case delay in the technology mapping of asynchronous burst-mode circuits. EURO-DAC 1996: 284-289 - 1995
- [c7]Chris J. Myers, Peter A. Beerel, Teresa H.-Y. Meng:
Technology mapping of timed circuits. ASYNC 1995: 138- - [c6]Peter A. Beerel, Kenneth Y. Yun, Steven M. Nowick, Pei-Chuan Yeh:
Estimation and bounding of energy consumption in burst-mode control circuits. ICCAD 1995: 26-33 - [c5]Peter A. Beerel, Cheng-Ta Hsieh, Suhrid A. Wadekar:
Estimation of energy consumption in speed-independent control circuits. ISLPD 1995: 39-44 - 1994
- [c4]Peter A. Beerel, Jerry R. Burch, Teresa H.-Y. Meng:
Sufficient conditions for correct gate-level speed-independent circuits. ASYNC 1994: 33-43 - 1993
- [c3]Peter A. Beerel, Jerry R. Burch, Teresa H.-Y. Meng:
Efficient verification of determinate speed-independent circuits. ICCAD 1993: 261-267 - 1992
- [j1]Peter A. Beerel, Teresa H.-Y. Meng:
Semi-modularity and testability of speed-independent circuits. Integr. 13(3): 301-322 (1992) - [c2]Peter A. Beerel, Teresa H.-Y. Meng:
Automatic gate-level synthesis of speed-independent circuits. ICCAD 1992: 581-586 - 1991
- [c1]Peter A. Beerel, Teresa H.-Y. Meng:
Testability of Asynchronous Timed Control Circuits with Delay Assumptions. DAC 1991: 446-451
Coauthor Index
[c148] [i66] [c143] [c140] [c137] [c136] [c134] [c131] [i63] [i61] [i58] [i56] [i55] [j44] [c127] [c126] [c121] [c119] [c118] [c117] [c114] [c113] [i50] [i49] [i44] [i42] [i41] [i39] [c111] [c108] [c105] [i37] [i36] [i34] [i33] [i32] [i30] [i29] [j38] [c100] [c98] [i26] [i25] [i24] [i20] [c92] [i16] [i10]
Akhilesh Jaiswal 0001
aka: Akhilesh R. Jaiswal
aka: Akhilesh R. Jaiswal
[c148] [c147] [c146] [c145] [c144] [c139] [c135] [i62] [i60] [i59] [i58] [c130] [c129] [c127] [c126] [c125] [c124] [c123] [c122] [c121] [c120] [c118] [c115] [c113] [i52] [i51] [i50] [i49] [i48] [i47] [i44] [i40] [j40] [c112] [c109] [c105] [i37] [i35] [i34] [i31] [i29] [c104] [c101] [c100] [c99] [c98] [i26] [i25] [i24] [i22] [i21] [i19] [j36] [i17] [i16] [i13] [c91] [c90] [i11] [i10] [c82] [i7] [i5]
Matheus T. Moreira
aka: Matheus Trevisan Moreira
aka: Matheus Trevisan Moreira
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