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Mariano López-García
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2010 – 2019
- 2018
- [j6]Enrique F. Cantó-Navarro, Mariano López-García, Rafael Ramos-Lara:
Floating-point accelerator for biometric recognition on FPGA embedded systems. J. Parallel Distributed Comput. 112: 20-34 (2018) - [j5]Ruben Lumbiarres-Lopez, Mariano López-García, Enrique F. Cantó-Navarro:
Hardware Architecture Implemented on FPGA for Protecting Cryptographic Keys against Side-Channel Attacks. IEEE Trans. Dependable Secur. Comput. 15(5): 898-905 (2018) - 2016
- [j4]Ruben Lumbiarres-Lopez, Mariano López-García, Enrique F. Cantó-Navarro:
A new countermeasure against side-channel attacks based on hardware-software co-design. Microprocess. Microsystems 45: 324-338 (2016) - 2015
- [j3]Enrique F. Cantó-Navarro, Mariano López-García, Rafael Ramos-Lara, Raul Sánchez-Reillo:
Flexible Biometric Online Speaker-Verification System Implemented on FPGA Using Vector Floating-Point Units. IEEE Trans. Very Large Scale Integr. Syst. 23(11): 2497-2507 (2015) - 2014
- [j2]Mariano López-García, Rafael Ramos-Lara, Oscar Miguel-Hurtado, Enrique F. Cantó-Navarro:
Embedded System for Biometric Online Signature Verification. IEEE Trans. Ind. Informatics 10(1): 491-501 (2014) - [c4]Ruben Lumbiarres-Lopez, Mariano López-García, Enrique F. Cantó-Navarro:
Implementation on MicroBlaze of AES algorithm to reveal fake keys against side-channel attacks. ISIE 2014: 1882-1887 - 2013
- [j1]Rafael Ramos-Lara, Mariano López-García, Enrique F. Cantó-Navarro, Luis Puente-Rodriguez:
Real-Time Speaker Verification System Implemented on Reconfigurable Hardware. J. Signal Process. Syst. 71(2): 89-103 (2013)
2000 – 2009
- 2009
- [c3]Enrique Cantó, Mariano Fons, Mariano López-García, Rafael Ramos-Lara:
Acceleration of complex algorithms on a fast reconfigurable embedded system on Spartan-3. FPL 2009: 429-434 - [c2]Rafael Ramos-Lara, Mariano López-García, Enrique F. Cantó-Navarro, Luis Puente-Rodriguez:
SVM speaker verification system based on a low-cost FPGA. FPL 2009: 582-586 - 2006
- [c1]Mariano López-García, Enrique F. Cantó-Navarro:
FPGA Implementation of a Ridge Extraction Fingerprint Algorithm Based on Microblaze and Hardware Coprocessor. FPL 2006: 1-5
Coauthor Index
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